[PATCH v4 1/2] dt-bindings: clock: xilinx: add description of user monitor interrupt

[Krzysztof Kozlowski]

On 14/02/2026 19:10, Harry Austen wrote:
> This Xilinx clocking wizard IP core outputs this interrupt signal to
> indicate when one of the four optional user clock inputs is either
> stopped, overruns, underruns or glitches.
> 
> This functionality was only added from version 6.0 onwards, so restrict
> it to particular compatible strings.
> 
> Signed-off-by: Harry Austen <hpausten at protonmail.com>
> ---
> v3 -> v4: Slight rework and rebase, removing Krzysztof's R-b tag
> v2 -> v3: Add Krzysztof's R-b tag
> v1 -> v2: Fix binding errors by moving interrupts up front, restrict later
> 


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at oss.qualcomm.com>

Best regards,
Krzysztof