[PATCH v2 1/9] dt-bindings: bus: document the RISAB firewall peripheral

[Gatien Chevallier]

Add documentation on the Resource ISolation peripheral unit for
Address space protection (Block-based) (RISAB) peripheral that is a
memory firewall on the stm32mp2x platforms protecting internal RAMs.

Signed-off-by: Gatien Chevallier <gatien.chevallier at foss.st.com>
---
 .../bindings/bus/st,stm32mp25-risab.yaml           | 75 ++++++++++++++++++++++
 1 file changed, 75 insertions(+)

diff --git a/Documentation/devicetree/bindings/bus/st,stm32mp25-risab.yaml b/Documentation/devicetree/bindings/bus/st,stm32mp25-risab.yaml
new file mode 100644
index 000000000000..f614f2287751
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/st,stm32mp25-risab.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/bus/st,stm32mp25-risab.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STM32 Resource ISolation peripheral unit for Address space protection
+       (Block-based) (RISAB)
+
+maintainers:
+  - Gatien Chevallier <gatien.chevallier at foss.st.com>
+
+description:
+  The Resource Isolation Framework (RIF) is a comprehensive set of hardware
+  blocks designed to enforce and manage isolation of STM32 hardware resources,
+  like memory and peripherals. The RISAB peripheral is part of the RIF and is
+  used to protect internal RAMs by applying access rights per RISAB fixed-size
+  page. Through RISAB registers, a trusted domain, or the domain to whom the
+  page configuration has been delegated, assigns memory pages to one or more
+  security domains (secure, privilege, compartment).
+
+properties:
+  compatible:
+    const: st,stm32mp25-risab
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: RISAB bus clock
+
+  memory-region:
+    minItems: 1
+    maxItems: 32
+    description:
+      Phandle to nodes describing memory regions to be configured in the RISAB
+      by the trusted domain of at least a RISAB page size.
+      These regions cannot overlap. A region must be within st,mem-map range and
+      can be represented by one or more pages. RISAB has a 4kBytes page
+      granularity and each page can hold different access rights.
+
+  st,mem-map:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description: Memory address range covered by the RISAB.
+    items:
+      - description: Memory range base address
+      - description: Memory range size
+
+  st,srwiad:
+    description:
+      When set, the trusted domain configures the RISAB to allow secure
+      read/write data accesses to non-secure blocks and pages. Secure execute
+      remains illegal.
+    type: boolean
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - st,mem-map
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/clock/st,stm32mp25-rcc.h>
+
+    firewall at 420f0000 {
+        compatible = "st,stm32mp25-risab";
+        reg = <0x420f0000 0x1000>;
+        clocks = <&rcc CK_ICN_LS_MCU>;
+        st,mem-map = <0xa000000 0x20000>;
+        st,srwiad;
+    };

-- 
2.43.0