[PATCH 11/11] ARM: dts: rockchip: Add Onion RV1103B Omega4

[Jonas Karlman]

Hi Fabio,

On 2/6/2026 7:13 PM, Fabio Estevam wrote:
> From: Fabio Estevam <festevam at nabladev.com>
> 
> Onion Omega4 board is a board based on the RV1103B SoC that has:
> 
> - 256 MB of RAM
> - 256 MB of SPI-NAND
> - Ethernet
> - USB OTG
> - Wifi
> - SD card
> - Camera connector
> 
> Add the initial support for this board so that it can fully boot into
> Linux with the root file system stored in the SPI NAND.
> 
> Signed-off-by: Fabio Estevam <festevam at nabladev.com>
> ---
>  arch/arm/boot/dts/rockchip/Makefile           |  1 +
>  arch/arm/boot/dts/rockchip/rv1103b-omega4.dts | 92 +++++++++++++++++++
>  2 files changed, 93 insertions(+)
>  create mode 100644 arch/arm/boot/dts/rockchip/rv1103b-omega4.dts
> 
> diff --git a/arch/arm/boot/dts/rockchip/Makefile b/arch/arm/boot/dts/rockchip/Makefile
> index 716f5540e438..d8cd5df138cc 100644
> --- a/arch/arm/boot/dts/rockchip/Makefile
> +++ b/arch/arm/boot/dts/rockchip/Makefile
> @@ -1,5 +1,6 @@
>  # SPDX-License-Identifier: GPL-2.0
>  dtb-$(CONFIG_ARCH_ROCKCHIP) += \
> +	rv1103b-omega4.dtb \
>  	rv1108-elgin-r1.dtb \
>  	rv1108-evb.dtb \
>  	rv1109-relfor-saib.dtb \
> diff --git a/arch/arm/boot/dts/rockchip/rv1103b-omega4.dts b/arch/arm/boot/dts/rockchip/rv1103b-omega4.dts
> new file mode 100644
> index 000000000000..512b063bceb1
> --- /dev/null
> +++ b/arch/arm/boot/dts/rockchip/rv1103b-omega4.dts
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
> + * Copyright (c) 2025 plan44.ch/luz
> + * Copyright (c) 2025 Onion Corporation
> + */
> +
> +/dts-v1/;
> +
> +#include "rv1103b.dtsi"
> +
> +/ {
> +	model = "Onion RV1103 Omega4 Board";
> +	compatible = "onion,rv1103b-omega4", "rockchip,rv1103b";
> +
> +	chosen {
> +		stdout-path = &uart0;

Please add a serial0 alias and use the following form to match most
other Rockchip boards.

 		stdout-path = "serial0:115200n8";

> +	};
> +
> +	memory at 0 {
> +		device_type = "memory";
> +		reg = <0x0 0x10000000>;
> +	};

Memory nodes is typically added by firmware on Rockchip platform.

Size of the DRAM is typically encoded in OS_REG2 by the DRAM init
code and can/should be picked up from there for next boot stages.

> +	leds {
> +		compatible = "gpio-leds";
> +
> +		led-0	{
> +			gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;

Please add pinctrl props for this pin. Also please add function and
color props.

> +			label = "sys";
> +			default-state = "on";
> +		};
> +	};
> +};
> +
> +&fspi0 {
> +	bootph-all;

This is not really needed in all boot phases, the initial phase only
initialize DRAM and then return to BootROM so does not need to know
about the spi flash.

Also adding it here is not enough, please instead add bootph props to
the flash at 0 or possible partitions node.

For optimal boot performance and size consideration you should drop
this and add following bootph props.

> +	status = "okay";
> +
> +	flash at 0 {
> +		compatible = "spi-nand";
> +		reg = <0>;

		bootph-pre-ram;
		bootph-some-ram;

Adding these here ensure that this and the parent node is included in
the second stage and the pre-relocation boot-phase, the only phases they
are needed.

Regards,
Jonas

> +		spi-max-frequency = <75000000>;
> +		spi-rx-bus-width = <4>;
> +		spi-tx-bus-width = <1>;
> +
> +		partitions {
> +			compatible = "fixed-partitions";
> +			#address-cells = <1>;
> +			#size-cells = <1>;
> +
> +			partition at 0 {
> +				label = "env";
> +				reg = <0x00000000 0x00040000>;
> +			};
> +
> +			partition at 40000 {
> +				label = "idblock";
> +				reg = <0x00040000 0x00100000>;
> +				read-only;
> +			};
> +
> +			partition at 140000 {
> +				label = "uboot";
> +				reg = <0x00140000 0x00100000>;
> +				read-only;
> +			};
> +
> +			partition at 240000 {
> +				label = "boot";
> +				reg = <0x00240000 0x00800000>;
> +			};
> +
> +			partition at a40000 {
> +				label = "ubi";
> +				reg = <0x00a40000 0x0f5c0000>;
> +			};
> +		};
> +	};
> +};
> +
> +&uart0 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&uart0m0_xfer_pins>;
> +	bootph-all;
> +	status = "okay";
> +};
> +
> +&wdt {
> +	bootph-all;
> +	status = "okay";
> +};