[PATCH 02/11] dt-bindings: clk: rockchip: Add RV1103B clock header

Jonas Karlman jonas at kwiboo.se
Fri Feb 6 12:15:30 PST 2026


Hi Fabio,

On 2/6/2026 7:13 PM, Fabio Estevam wrote:
> From: Fabio Estevam <festevam at nabladev.com>
> 
> Add the RV1103B clock and reset IDs.
> 
> Cc: Stephen Boyd <sboyd at kernel.org>
> Signed-off-by: Fabio Estevam <festevam at nabladev.com>
> ---
>  .../dt-bindings/clock/rockchip,rv1103b-cru.h  | 488 ++++++++++++++++++
>  1 file changed, 488 insertions(+)
>  create mode 100644 include/dt-bindings/clock/rockchip,rv1103b-cru.h
> 
> diff --git a/include/dt-bindings/clock/rockchip,rv1103b-cru.h b/include/dt-bindings/clock/rockchip,rv1103b-cru.h
> new file mode 100644
> index 000000000000..92c994185354
> --- /dev/null
> +++ b/include/dt-bindings/clock/rockchip,rv1103b-cru.h
> @@ -0,0 +1,488 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
> +/*
> + * Copyright (c) 2024 Rockchip Electronics Co. Ltd.
> + * Author: Elaine Zhang <zhangqing at rock-chips.com>
> + */
> +
> +#ifndef _DT_BINDINGS_CLK_ROCKCHIP_RV1103B_H
> +#define _DT_BINDINGS_CLK_ROCKCHIP_RV1103B_H
> +
> +/* pll clocks */
> +#define PLL_GPLL				1
> +#define ARMCLK					2
> +#define PLL_DPLL				3
> +
> +/* clk (clocks) */
> +#define XIN_OSC0_HALF				5
> +#define CLK_GPLL_DIV24				6

Clock indices should start at 0 and be a continuous series without gaps.

[snip]

> +// PERICRU_SOFTRST_CON00(Offset:0xA00)
> +#define SRST_ARESETN_PERI_BIU			0x00000002
> +#define SRST_HRESETN_HPMCU_BIU			0x00000003
> +#define SRST_LSRESETN_PERI_BIU			0x00000004
> +#define SRST_PRESETN_PERI_BIU			0x00000005
> +#define SRST_PRESETN_RTC_BIU			0x00000006
> +#define SRST_HRESETN_BOOTROM			0x00000007

Reset indices should start at 0 and be a continuous series, they should
not encode register offset and bit information like downstream kernel.

Also please move the resets indices to a separate header, see most
recent Rockchip SoCs clock and reset additions, e.g. rk3528, rk3506 or
rk3562 for inspiration.

[snip]

> +#define CLK_NR_SRST				(SRST_PRESETN_CRU_PMU1 + 1)

Please drop this, not part of the binding.

Regards,
Jonas

> +#endif



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