[PATCH 1/3] soc cache: L3 cache driver for HiSilicon SoC

[Krzysztof Kozlowski]

On 03/02/2026 18:19, Arnd Bergmann wrote:
> On Tue, Feb 3, 2026, at 17:18, Yushan Wang wrote:
>> The driver will create a file of `/dev/hisi_l3c` on init, mmap
>> operations to it will allocate a memory region that is guaranteed to be
>> placed in L3 cache.
>>
>> The driver also provides unmap() to deallocated the locked memory.
>>
>> The driver also provides an ioctl interface for user to get cache lock
>> information, such as lock restrictions and locked sizes.
>>
>> Signed-off-by: Yushan Wang <wangyushan12 at huawei.com>
> 
> Hi Yushan,
> 
> Thanks for your submission. Since we are in the last week of
> the merge window, this is not going to be linux-7.0 material,
> but I'll have a quick look for now.


To be clear - this is a v3 but with removed previous history...

Previous version:
https://lore.kernel.org/all/20251217102357.1730573-2-wangyushan12@huawei.com/

Or even v4?

https://lore.kernel.org/all/20250122065803.3363926-2-wangyushan12@huawei.com/

Yushan, please start versioning your patches correctly. Use b4 or git
format-patch -vx

Otherwise, please explain us how can we compare it with `b4 diff` with
previous version?

Sending something AGAIN as v1 ignoring entire previous submission is
clear no go. Like you are trying till it succeeds. Negative review?
Let's try from v1 this time...

This is not correct and it should not be my task to find your previous
discussions and decipher this v1.


Best regards,
Krzysztof