[PATCH v2] PCI: dw-rockchip: Enable async probe by default

[Anand Moon]

Hi Niklas

On Mon, 2 Feb 2026 at 15:32, Niklas Cassel <cassel at kernel.org> wrote:
>
> On Fri, Jan 30, 2026 at 11:25:37AM +0100, Niklas Cassel wrote:
> > Note that I've built the network PHY driver that phylib wants to load
> > (CONFIG_REALTEK_PHY=y) as built-in. As long as the PHY driver is built
> > as built-in, I don't think that the problem the modules code is warning
> > about can happen. (But I also don't understand why it is trying to load
> > a module when the driver is built as built-in in the first place...)
>
> FWIW, the reason why PHYLIB tries to load the module even though it is built
> as built-in (i.e. is already loaded) is explained by the following comment:
> https://github.com/torvalds/linux/blob/v6.19-rc8/drivers/net/phy/phy_device.c#L852-L855
>
Yes, I have gone through the history of changes.

>
> Kind regards,
> Niklas
Thanks
-Anand