[PATCH v3 1/2] dt-bindings: dsp: mediatek: add mt8196 dsp document

[Hailong Fan (范海龙)]

On Wed, 2025-09-17 at 14:10 +0200, AngeloGioacchino Del Regno wrote:
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> 
> 
> Il 17/09/25 09:53, hailong.fan ha scritto:
> > From: Hailong Fan <hailong.fan at mediatek.com>
> > 
> > Add device tree binding documentation for the MediaTek
> > MT8196 DSP. The DSP is used by the Sound Open Firmware
> > driver node and includes registers, clocks, memory regions,
> > and a mailbox for DSP communication.
> > 
> > Signed-off-by: Hailong Fan <hailong.fan at mediatek.com>
> > ---
> >   .../bindings/dsp/mediatek,mt8196-dsp.yaml     | 98
> > +++++++++++++++++++
> >   1 file changed, 98 insertions(+)
> >   create mode 100644
> > Documentation/devicetree/bindings/dsp/mediatek,mt8196-dsp.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/dsp/mediatek,mt8196-
> > dsp.yaml b/Documentation/devicetree/bindings/dsp/mediatek,mt8196-
> > dsp.yaml
> > new file mode 100644
> > index 000000000000..af0f9d71200f
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/dsp/mediatek,mt8196-
> > dsp.yaml
> > @@ -0,0 +1,98 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: 
> > https://urldefense.com/v3/__http://devicetree.org/schemas/dsp/mediatek,mt8196-dsp.yaml*__;Iw!!CTRNKA9wMg0ARbw!jczzeSifwD9nivKzyqIiaqs9s0VIhhGx5ykV0g320346NPZerYtey1Lghr-GF1jAk5GIlNlz0fG8qDJgxk-hnQXvfDq77PLd$
> > +$schema: 
> > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!jczzeSifwD9nivKzyqIiaqs9s0VIhhGx5ykV0g320346NPZerYtey1Lghr-GF1jAk5GIlNlz0fG8qDJgxk-hnQXvfI9leuES$
> > +
> > +title: MediaTek mt8196 DSP core
> 
> mt->MT (MT8196)
OK, thx.

> 
> > +
> > +maintainers:
> > +  - Hailong Fan <hailong.fan at mediatek.com>
> > +
> > +description: |
> 
> Drop the colon |, you don't need it.
OK, thx.

> 
> 
> > +  The MediaTek mt8196 SoC contains a DSP core used for advanced
> > pre-
> 
> mt->MT (MT8196)
> 
> Also document *which* DSP core this SoC contains. Specifically, say
> that this SoC
> contains a dual-core Cadence HiFi5 Audio Engine DSP - because this is
> what it is.
OK, thx.

> 
> > +  and post-audio processing. This DSP is typically used by the
> > Sound
> > +  Open Firmware (SOF) driver and requires registers, clocks,
> > memory
> > +  regions, and a mailbox for communication.
> 
> ..snip..
> 
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    #include <dt-bindings/clock/mt8196-clk.h>
> > +    #include <dt-bindings/power/mt8196-power.h>
> 
> Before including binding headers with the same names as downstream,
> refer to the
> series that are currently on the mailing lists, because that's what
> will ultimately
> get upstream.
> 
> dt-bindings/clock/mediatek,mt8196-clock.h
> dt-bindings/power/mediatek,mt8196-power.h
OK, thx.

> 
> > +    adsp at 1a000000 {
> > +        compatible = "mediatek,mt8196-dsp";
> > +        reg = <0x1a000000 0x5000>,
> > +              <0x1a210000 0x80000>,
> > +              <0x1a345000 0x300>,
> > +              <0x1a00f000 0x1000>;
> > +        reg-names = "cfg", "sram", "sec", "bus";
> > +        clocks = <&cksys_clk CLK_CK_ADSP_SEL>,
> > +                 <&cksys_clk CLK_CK_TCK_26M_MX9>,
> > +                 <&cksys_clk CLK_CK_ADSPPLL>;
> 
> and use the upstream names for those clocks.
> 
> <&topckgen CLK_TOP_ADSP>,
> <&clk26m>,
> <&apmixedsys CLK_APMIXED_ADSPPLL>,
Yes, I have already seen the relevant changes in the latest linux-next. 
They will be updated in the next version. Thanks a lot.

> 
> > +        clock-names = "audiodsp",
> > +                      "sys_clk",
> > +                      "adsppll";
> 
> clock-names fit in one line; plus, please "sys-clk" instead.
> 
> > +        power-domains = <&scpsys
> > MT8196_POWER_DOMAIN_ADSP_TOP_DORMANT>;
> 
> power-domains = <&spm MT8196_POWER_DOMAIN_ADSP_TOP_DORMANT>;
OK, thx.

> 
> > +        mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
> > +        mbox-names = "rx", "tx";
> > +    };
> 
> Regards,
> Angelo