[PATCH v5 6/7] arm64: dts: renesas: Add R8A78000 X5H DTs

Marc Zyngier maz at kernel.org
Wed Sep 24 02:37:30 PDT 2025


On Wed, 24 Sep 2025 00:56:28 +0100,
Kuninori Morimoto <kuninori.morimoto.gx at renesas.com> wrote:
> 
> 
> Hi Marc
> 
> # sorry for late response. I had took day-off
> 
> > > > > +             /*
> > > > > +              * The ARM GIC-720AE - View 1
> > > > > +              *
> > > > > +              * see
> > > > > +              *      r19uh0244ej0052-r-carx5h.pdf
> > > > > +              *      - attachments: 002_R-CarX5H_Address_Map_r0p51.xlsx
> > > > > +              *       - sheet [RT]
> > > > > +              *        - line 619
> > > > > +              */
> (snip)
> > Something like:
> > 
> > 	/* Application Processors manage View-1 of a GIC-720AE */
> > 
> > and the mention of the TRM and other spreadsheets dropped.
> 
> OK, will do
> 
> > the ITS to be described. The HW has it, it has no dependency on
> > anything else, so there is no reason to omit it.
> 
> I had asked HW team and PCI team, and there is a valid reason
> why we would like to skip it. Because we had issues with using ITS on
> previous SoCs. Hence we are reluctant to describe it until we can
> actually test it.

Posting patches for partially HW doesn't feel like a great approach.

> So far, we never submitted a complete .dtsi in one go, but always enabled
> more functionality in incremental steps, after verifying that it actually
> works.

Well, the GIC (and specially ARM's implementation) is a whole entity,
not something you can cut and dice. Just like you wouldn't describe
the CPUs without their timers.

	M.

-- 
Without deviation from the norm, progress is not possible.



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