[PATCH] pmdomain: mediatek: set default off flag for MT8195 AUDIO power domain

[Ulf Hansson]

On Tue, 23 Sept 2025 at 10:52, Louis-Alexis Eyraud
<louisalexis.eyraud at collabora.com> wrote:
>
> In MT8195 power domain data array, set the KEEP_DEFAULT_OFF and
> ACTIVE_WAKEUP flags for the AUDIO power domain entry to avoid
> having this domain being on during boot sequence when unneeded.
>
> Fixes: 0e789b491ba0 ("pmdomain: core: Leave powered-on genpds on until sync_state")
> Fixes: 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds on until late_initcall_sync")
> Signed-off-by: Louis-Alexis Eyraud <louisalexis.eyraud at collabora.com>

Applied for fixes, thanks!

Kind regards
Uffe


> ---
> Patch tested on Mediatek Genio 1200-EVK board (based on MT8395 SoC)
> with a kernel based on linux-next (tag: next-20250922).
> ---
>  drivers/pmdomain/mediatek/mt8195-pm-domains.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/pmdomain/mediatek/mt8195-pm-domains.h b/drivers/pmdomain/mediatek/mt8195-pm-domains.h
> index 9405e8f62eaf07112d52a28e6545d26a4342c7c6..1d3ca195ac75806c458db71db4538940f37128a8 100644
> --- a/drivers/pmdomain/mediatek/mt8195-pm-domains.h
> +++ b/drivers/pmdomain/mediatek/mt8195-pm-domains.h
> @@ -126,6 +126,7 @@ static const struct scpsys_domain_data scpsys_domain_data_mt8195[] = {
>                                     MT8195_TOP_AXI_PROT_EN_2_CLR,
>                                     MT8195_TOP_AXI_PROT_EN_2_STA1),
>                 },
> +               .caps = MTK_SCPD_KEEP_DEFAULT_OFF | MTK_SCPD_ACTIVE_WAKEUP,
>         },
>         [MT8195_POWER_DOMAIN_MFG0] = {
>                 .name = "mfg0",
>
> ---
> base-commit: fba389ea7aa6401d3539456123cbadfa1a87231e
> change-id: 20250922-mt8195-pmdomain-audio-fix-f7ebf2afb15f
>
> Best regards,
> --
> Louis-Alexis Eyraud <louisalexis.eyraud at collabora.com>
>