[PATCH v2 2/4] arm64: dts: imx8mn-evk: limit the max frequency of spi nor chip

[Frank Li]

On Wed, Sep 17, 2025 at 04:42:28PM +0800, Haibo Chen wrote:
> The spi nor on imx8mn evk board works under SDR mode, and
> driver use FlexSPIn_MCR0[RXCLKSRC] = 0x0 for SDR mode.
> According to the datasheet, there is IO limitation on this chip,

'chip' means spi-nor flash or imx8mn SoC? Looks like it is 8mn according
to below refers. can you change 'chip' to i.MX8MN

> the max frequency of such case is 66MHz, so add the limitation
> here to align with datasheet.
>
> Refer to 3.9.9 FlexSPI timing parameters on page 65.
> https://www.nxp.com/docs/en/data-sheet/IMX8MNCEC.pdf
>
> Fixes: 579df4288896 ("arm64: dts: imx8mn-evk: add QSPI flash")
> Signed-off-by: Haibo Chen <haibo.chen at nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
> index 145355ff91b454795478b504eb403b0590848d46..fa43238e7b917a5b5f0bd9af96bd900f6dbacb8d 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-evk.dtsi
> @@ -199,7 +199,7 @@ flash0: flash at 0 {
>  		reg = <0>;
>  		#address-cells = <1>;
>  		#size-cells = <1>;
> -		spi-max-frequency = <166000000>;
> +		spi-max-frequency = <66000000>;

Looks like flash's limiation, any common property in spi controller to limit
frequency?

Frank
>  		spi-tx-bus-width = <4>;
>  		spi-rx-bus-width = <4>;
>  	};
>
> --
> 2.34.1
>