[PATCH v3 00/31] CoreSight: Address CPU Power Management Issues

Leo Yan leo.yan at arm.com
Mon Sep 15 03:33:23 PDT 2025


This series addresses CPU power management issues in the CoreSight
drivers. For easier review, the patches are organized into two
categories:

o Patches 01 ~ 10 focus on CPU power management within the ETM drivers.
  These patches fix SMP-safe access to the mode, correct context
  synchronization, and refactor the CPU suspend/resume flows.

o Patches 11 ~ 31 extend CPU power management to cover activated paths,
  including helpers, links, and sinks. These changes move CPU PM and
  hotplug notifiers from the ETMv4 driver into the CoreSight core layer.

Summary:

- Patches 01 ~ 03: Fix device mode access in the SMP mode.
- Patch 04       : A minor fix for polling bit.
- Patches 05 ~ 07: Improve the context synchronization based on the ETM
                   specification (IHI0064H.b) and Arm ARM (ARM DDI 0487
                   L.a).
- Patches 08 ~ 10: Refactor the context save/restore flow in the ETMv4
                   driver, in the end, the CPU PM callbacks reuse the
                   normal enabling and disabling flows.
- Patches 11 ~ 17: Move CPU PM code from ETMv4 driver to the core layer.
- Patches 18 ~ 23: Enhance the CTI driver for preparation dynamically
                   controlling CTI devices in PM flows. This includes
                   device mode handling in the CTI driver and
                   distinguishing trace modes (Perf or SysFS). Refactor
                   the PM notifier and improve locking usage (including
                   for syscfg).
- Patches 24 ~ 31: Support save and restore context for TRBE and
                   manages activated paths during CPU idle and
                   CPU hotplug.

Verification:

This series has been verified on Juno-r0 and r2 platform.

  Stress test script:

  #!/usr/bin/bash

  echo 1 > /sys/bus/coresight/devices/tmc_etr0/enable_sink

  while true; do
          echo 0 > /sys/devices/system/cpu/cpu2/online;
          echo 1 > /sys/devices/system/cpu/cpu2/online;
  done &

  while true; do
          echo 1 > /sys/bus/coresight/devices/etm2/enable_source;
          echo 0 > /sys/bus/coresight/devices/etm2/enable_source;
  done &

  Test script with kernel module insmod / rmmod:

  #!/bin/bash

  modules=(
          "coresight"
          "coresight_dummy"
          "coresight_replicator"
          "coresight_tpiu"
          "coresight_cpu_debug"
          "coresight_etb10"
          "coresight_stm"
          "coresight_trbe"
          "coresight_tmc"
          "coresight_ctcu"
          "coresight_catu"
          "coresight_etm4x"
          "coresight_cti"
          "coresight_funnel"
          "coresight_tnoc"
  )
  module_dir="/mnt/build/drivers/hwtracing/coresight/"

  if [[ "$1" == "in" ]]; then
          echo "Inserting modules..."
          for mod in "${modules[@]}"; do
                  modprobe $mod && echo "Loaded $mod" || echo "Failed to load $mod"
          done
  elif [[ "$1" == "rm" ]]; then
          echo "Removing modules..."
          # Remove in reverse order to respect dependencies
          for (( idx=${#modules[@]}-1 ; idx>=0 ; idx-- )); do
                  mod="${modules[$idx]}"
                  echo "Removing $mod..."
                  rmmod "$mod" && echo "Removed $mod" || echo "Failed to remove $mod"
          done
  fi

---
Changes in v3:
- Fixed building failure in ETMv3 driver (kernel test robot).
- Refactoring ETMv3 change for checking CPU ID (Levi).
- Fixed NULL pointer issue during CPU idle (James).
- Fixed lockdep complaint for HARDIRQ-safe and HARDIRA-unsafe (James).
- Fixed acquiring mutex in atomic context (James).
- Rebased on the latest coresight-next branch.
- Link to v2: https://lore.kernel.org/r/20250701-arm_cs_pm_fix_v3-v2-0-23ebb864fcc1@arm.com

Changes in v2:
- Refactored ETMv4 suspend and resume for reusing the normal enabling
  and disabling flows (James).
- Used a per-CPU structure to maintain path pointers (James).
- Supported helpers in CPU PM flows (James).
- Fixed the SMP-safe access to device mode.
- Fixed the context synchronization in ETMv4x driver.
- Link to v1: https://lore.kernel.org/linux-arm-kernel/20250516160742.1200904-1-leo.yan@arm.com/

Signed-off-by: Leo Yan <leo.yan at arm.com>

---
Leo Yan (30):
      coresight: Change device mode to atomic type
      coresight: etm4x: Always set tracer's device mode on target CPU
      coresight: etm3x: Always set tracer's device mode on target CPU
      coresight: etm4x: Correct polling IDLE bit
      coresight: etm4x: Ensure context synchronization is not ignored
      coresight: etm4x: Add context synchronization before enabling trace
      coresight: etm4x: Properly control filter in CPU idle with FEAT_TRF
      coresight: etm4x: Remove the state_needs_restore flag
      coresight: etm4x: Add flag to control single-shot restart
      coresight: etm4x: Reuse normal enable and disable logic in CPU idle
      coresight: Populate CPU ID into the coresight_device structure
      coresight: sysfs: Validate CPU online status for per-CPU sources
      coresight: Set per CPU source pointer
      coresight: Register CPU PM notifier in core layer
      coresight: etm4x: Hook CPU PM callbacks
      coresight: Add callback to determine if context save/restore is needed
      coresight: etm4x: Remove redundant condition checks in save and restore
      coresight: cti: Fix race condition by using device mode
      coresight: cti: Introduce CS_MODE_DEBUG mode
      coresight: cti: Register PM notifier after data initialization
      coresight: cti: Properly handle modes in CPU PM notifiers
      coresight: cti: Make spin lock usage consistent
      coresight: syscfg: Use spinlock to protect active variables
      coresight: Add per-CPU path pointer
      coresight: Add 'in_idle' argument to path enable/disable functions
      coresight: Control path during CPU idle
      coresight: Add PM callbacks for percpu sink
      coresight: Take hotplug lock in enable_source_store() for Sysfs mode
      coresight: Move CPU hotplug callbacks to core layer
      coresight: Manage activated path during CPU hotplug

Yabin Cui (1):
      coresight: trbe: Save and restore state across CPU low power state

 drivers/hwtracing/coresight/coresight-catu.c       |   1 +
 drivers/hwtracing/coresight/coresight-core.c       | 337 ++++++++++++--
 drivers/hwtracing/coresight/coresight-ctcu-core.c  |   1 +
 drivers/hwtracing/coresight/coresight-cti-core.c   |  69 ++-
 drivers/hwtracing/coresight/coresight-cti-sysfs.c  |   2 +-
 drivers/hwtracing/coresight/coresight-dummy.c      |   1 +
 drivers/hwtracing/coresight/coresight-etb10.c      |   1 +
 drivers/hwtracing/coresight/coresight-etm3x-core.c |  55 ++-
 drivers/hwtracing/coresight/coresight-etm4x-core.c | 491 ++++++---------------
 drivers/hwtracing/coresight/coresight-etm4x.h      |  62 ---
 drivers/hwtracing/coresight/coresight-funnel.c     |   1 +
 drivers/hwtracing/coresight/coresight-replicator.c |   1 +
 drivers/hwtracing/coresight/coresight-stm.c        |   1 +
 drivers/hwtracing/coresight/coresight-syscfg.c     |  22 +-
 drivers/hwtracing/coresight/coresight-syscfg.h     |   2 +
 drivers/hwtracing/coresight/coresight-sysfs.c      |  10 +
 drivers/hwtracing/coresight/coresight-tmc-core.c   |   1 +
 drivers/hwtracing/coresight/coresight-tpda.c       |   1 +
 drivers/hwtracing/coresight/coresight-tpdm.c       |   1 +
 drivers/hwtracing/coresight/coresight-tpiu.c       |   1 +
 drivers/hwtracing/coresight/coresight-trbe.c       |  85 ++++
 drivers/hwtracing/coresight/ultrasoc-smb.c         |   1 +
 include/linux/coresight.h                          |  55 ++-
 23 files changed, 687 insertions(+), 515 deletions(-)
---
base-commit: 559d6c380ea0a27e71d0269410301303515e4179
change-id: 20250909-arm_coresight_power_management_fix-139873f942e8

Best regards,
-- 
Leo Yan <leo.yan at arm.com>




More information about the linux-arm-kernel mailing list