[PATCH 2/3] arm64: dts: exynos: Add initial support for the Exynos9610 SoC
Krzysztof Kozlowski
krzk at kernel.org
Sun Sep 14 21:36:16 PDT 2025
On 14/09/2025 22:44, Alexandru Chimac wrote:
> +
> + arm-a53-pmu {
> + compatible = "arm,cortex-a53-pmu";
> + interrupts = <0 82 4>,
> + <0 83 4>,
> + <0 84 4>,
> + <0 85 4>;
> + interrupt-affinity = <&cpu0>,
> + <&cpu1>,
> + <&cpu2>,
> + <&cpu3>;
> + };
> +
> + arm-a73-pmu {
> + compatible = "arm,cortex-a73-pmu";
> + interrupts = <0 96 4>,
> + <0 97 4>,
> + <0 98 4>,
> + <0 99 4>;
You need to use proper defines.
> + interrupt-affinity = <&cpu100>,
> + <&cpu101>,
> + <&cpu102>,
> + <&cpu103>;
> + };
> +
> + oscclk: clock-osc {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-output-names = "oscclk";
> + clock-frequency = <26000000>;
clock-frequency is board property.
...
> +
> + timer {
> + compatible = "arm,armv8-timer";
> + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
> + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
> +
> + /* Stock Samsung bootloader doesn't configure CNTFRQ_EL0 */
> + clock-frequency = <26000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges;
> +
> + abox_rmem: abox at e9400000 {
What is abox?
> + compatible = "reserved-memory";
> + reg = <0x0 0xe9400000 0x2800000>;
> + no-map;
> + };
> +
> + ramoops at f9d10000 {
This belongs to the the board.
> + compatible = "ramoops";
> + reg = <0x0 0xf9d10000 0x200000>;
> + record-size = <0x80000>;
> + console-size = <0x80000>;
Best regards,
Krzysztof
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