[PATCH v3 2/2] arm64: dts: rockchip: Add devicetree for the ROC-RK3588-RT
Andrew Lunn
andrew at lunn.ch
Sun Sep 14 20:01:56 PDT 2025
> +&gmac0 {
> + clock_in_out = "output";
> + phy-handle = <&rgmii_phy0>;
> + phy-mode = "rgmii-id";
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac0_miim
> + &gmac0_tx_bus2
> + &gmac0_rx_bus2
> + &gmac0_rgmii_clk
> + &gmac0_rgmii_bus>;
> + status = "okay";
> +};
> +
> +&gmac1 {
> + clock_in_out = "output";
> + phy-handle = <&rgmii_phy1>;
> + phy-mode = "rgmii-id";
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac1_miim
> + &gmac1_tx_bus2
> + &gmac1_rx_bus2
> + &gmac1_rgmii_clk
> + &gmac1_rgmii_bus>;
> + status = "okay";
> +};
> +&mdio0 {
> + rgmii_phy0: ethernet-phy at 1 {
> + compatible = "ethernet-phy-id001c.c916";
> + reg = <0x1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&rtl8211f_0_rst>;
> + reset-assert-us = <20000>;
> + reset-deassert-us = <100000>;
> + reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
> + };
> +};
> +
> +&mdio1 {
> + rgmii_phy1: ethernet-phy at 1 {
> + compatible = "ethernet-phy-id001c.c916";
> + reg = <0x1>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&rtl8211f_1_rst>;
> + reset-assert-us = <20000>;
> + reset-deassert-us = <100000>;
> + reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
> + };
> +};
For these nodes only:
Reviewed-by: Andrew Lunn <andrew at lunn.ch>
Andrew
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