[PATCH v2 7/7] arm64: dts: allwinner: a523: Add NPU device node

[Jernej Škrabec]

Dne četrtek, 11. september 2025 ob 19:47:10 Srednjeevropski poletni čas je Chen-Yu Tsai napisal(a):
> From: Chen-Yu Tsai <wens at csie.org>
> 
> The Allwinner T527 SoC has an NPU built in. Based on identifiers found
> in the BSP, it is a Vivante IP block. After enabling it, the etnaviv
> driver reports it as a GC9000 revision 9003.
> 
> The standard bindings are used as everything matches directly. There is
> no option for DVFS at the moment. That might require some more work,
> perhaps on the efuse side to map speed bins.
> 
> It is unclear whether the NPU block is fused out at the hardware level
> or the BSP limits use of the NPU through software, as the author only
> has boards with the T527.
> 
> Reviewed-by: Andre Przywara <andre.przywara at arm.com>
> Signed-off-by: Chen-Yu Tsai <wens at csie.org>


Reviewed-by: Jernej Skrabec <jernej.skrabec at gmail.com>

Best regards,
Jernej

> ---
>  arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> index f93376372aba..9676caf9bd4e 100644
> --- a/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun55i-a523.dtsi
> @@ -852,6 +852,18 @@ mcu_ccu: clock-controller at 7102000 {
>  			#clock-cells = <1>;
>  			#reset-cells = <1>;
>  		};
> +
> +		npu: npu at 7122000 {
> +			compatible = "vivante,gc";
> +			reg = <0x07122000 0x1000>;
> +			interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&mcu_ccu CLK_BUS_MCU_NPU_ACLK>,
> +				 <&ccu CLK_NPU>,
> +				 <&mcu_ccu CLK_BUS_MCU_NPU_HCLK>;
> +			clock-names = "bus", "core", "reg";
> +			resets = <&mcu_ccu RST_BUS_MCU_NPU>;
> +			power-domains = <&ppu PD_NPU>;
> +		};
>  	};
>  
>  	thermal-zones {
>