[PATCH] arm64: dts: imx8mm-phycore-som: optimize drive strengh
Teresa Remmet
t.remmet at phytec.de
Tue Sep 9 23:42:48 PDT 2025
Am Mittwoch, dem 10.09.2025 um 08:17 +0200 schrieb Jan Remmet:
> Reduce ENET pin drive strength from X6 to X4 to optimize signal
> quality and reduce potential signal integrity issues.
>
> Signed-off-by: Jan Remmet <j.remmet at phytec.de>
Reviewed-by: Teresa Remmet <t.remmet at phytec.de>
> ---
> arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> index 672baba4c8d0..921a7f58fd41 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-phycore-som.dtsi
> @@ -340,10 +340,10 @@
> MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x90
> MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL
> 0x90
> MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0
> 0x16
> MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1
> 0x16
> -
> MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2
> 0x16
> -
> MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3
> 0x16
> -
> MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC
> 0x16
> -
> MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL
> 0x16
> + MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2
> 0x12
> + MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3
> 0x12
> + MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC
> 0x12
> + MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL
> 0x12
> MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7
> 0x10
> >;
> };
--
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Geschäftsführer: Dipl.-Ing. Michael Mitezki, Dipl.-Ing. Bodo Huber,
Dipl.-Ing. (FH) Markus Lickes | Handelsregister Mainz HRB 4656 |
Finanzamt Mainz | St.Nr. 26/665/00608, DE 149059855
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