[PATCH rfcv1 4/8] iommu/arm-smmu-v3: Introduce a per-domain arm_smmu_invs array
Nicolin Chen
nicolinc at nvidia.com
Mon Sep 8 11:20:44 PDT 2025
On Mon, Sep 08, 2025 at 12:51:49PM -0300, Jason Gunthorpe wrote:
> On Sat, Sep 06, 2025 at 01:16:45AM -0700, Nicolin Chen wrote:
> > > /*
> > > * A sorted array allows batching invalidations together for fewer SYNCs.
> > > * Also, ATS must follow the ASID/VMID invalidation SYNC.
> > > */
> > > sort_nonatomic(new_invs->inv, new_invs->num_invs,
> > > sizeof(add_invs->inv[0]), arm_smmu_invs_cmp, NULL);
> > > return new_invs;
>
> This should be deleted, merge sort always makes sorted lists.
I see. Dropping it.
Thanks
Nicolin
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