[PATCH v4 29/34] arm64: dts: ti: k3-j722s-ti-ipc-firmware: Refactor IPC cfg into new dtsi
Beleswar Padhi
b-padhi at ti.com
Mon Sep 8 07:28:21 PDT 2025
The TI K3 J722S SoCs have multiple programmable remote processors like
R5F, C7x etc. The TI SDKs for J722S SoCs offer sample firmwares which
could be run on these cores to demonstrate an "echo" IPC test. Those
firmware require certain memory carveouts to be reserved from system
memory, timers to be reserved, and certain mailbox configurations for
interrupt based messaging. These configurations could be different for a
different firmware.
While DT is not meant for system configurations, at least refactor these
configurations from board level DTS into a dtsi for now. This dtsi for
TI IPC firmware is board-independent and can be applied to all boards
from the same SoC Family. This gets rid of code duplication and allows
more freedom for users developing custom firmware (or no firmware) to
utilize system resources better; easily by swapping out this dtsi. To
maintain backward compatibility, the dtsi is included in all boards.
Signed-off-by: Beleswar Padhi <b-padhi at ti.com>
---
v4: Changelog:
1. Updated carveout node names to 'memory at addr'
Link to v3:
https://lore.kernel.org/all/20250905051846.1189612-29-b-padhi@ti.com/
v3: Changelog:
1. None
Link to v2:
https://lore.kernel.org/all/20250823160901.2177841-29-b-padhi@ti.com/
v2: Changelog:
1. Re-ordered patch from [PATCH 14/33] to [PATCH v2 28/33].
Link to v1:
https://lore.kernel.org/all/20250814223839.3256046-15-b-padhi@ti.com/
.../arm64/boot/dts/ti/k3-am67a-beagley-ai.dts | 155 +----------------
arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 157 +----------------
.../boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi | 163 ++++++++++++++++++
3 files changed, 166 insertions(+), 309 deletions(-)
create mode 100644 arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi
diff --git a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
index 85436ea5b4e7..b697035df04e 100644
--- a/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
+++ b/arch/arm64/boot/dts/ti/k3-am67a-beagley-ai.dts
@@ -61,60 +61,6 @@ wkup_r5fss0_core0_memory_region: memory at a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core0_dma_memory_region: memory at a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core0_memory_region: memory at a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: memory at a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: memory at a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- c7x_0_dma_memory_region: memory at a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- c7x_0_memory_region: memory at a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- c7x_1_dma_memory_region: memory at a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- c7x_1_memory_region: memory at a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: memory at a5000000 {
- reg = <0x00 0xa5000000 0x00 0x1c00000>;
- alignment = <0x1000>;
- no-map;
- };
};
vsys_5v0: regulator-1 {
@@ -453,103 +399,4 @@ &sdhci1 {
status = "okay";
};
-&mailbox0_cluster0 {
- status = "okay";
-
- mbox_wkup_r5_0: mbox-wkup-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
-
- mbox_mcu_r5_0: mbox-mcu-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_c7x_0: mbox-c7x-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster3 {
- status = "okay";
-
- mbox_main_r5_0: mbox-main-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c7x_1: mbox-c7x-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0 {
- status = "okay";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&c7x_0 {
- mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
- memory-region = <&c7x_0_dma_memory_region>,
- <&c7x_0_memory_region>;
- status = "okay";
-};
-
-&c7x_1 {
- mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
- memory-region = <&c7x_1_dma_memory_region>,
- <&c7x_1_memory_region>;
- status = "okay";
-};
+#include "k3-j722s-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
index d323284a30ab..a9b5d9a06241 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts
@@ -63,60 +63,6 @@ wkup_r5fss0_core0_memory_region: memory at a0100000 {
reg = <0x00 0xa0100000 0x00 0xf00000>;
no-map;
};
-
- mcu_r5fss0_core0_dma_memory_region: memory at a1000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1000000 0x00 0x100000>;
- no-map;
- };
-
- mcu_r5fss0_core0_memory_region: memory at a1100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa1100000 0x00 0xf00000>;
- no-map;
- };
-
- main_r5fss0_core0_dma_memory_region: memory at a2000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2000000 0x00 0x100000>;
- no-map;
- };
-
- main_r5fss0_core0_memory_region: memory at a2100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa2100000 0x00 0xf00000>;
- no-map;
- };
-
- c7x_0_dma_memory_region: memory at a3000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3000000 0x00 0x100000>;
- no-map;
- };
-
- c7x_0_memory_region: memory at a3100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa3100000 0x00 0xf00000>;
- no-map;
- };
-
- c7x_1_dma_memory_region: memory at a4000000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4000000 0x00 0x100000>;
- no-map;
- };
-
- c7x_1_memory_region: memory at a4100000 {
- compatible = "shared-dma-pool";
- reg = <0x00 0xa4100000 0x00 0xf00000>;
- no-map;
- };
-
- rtos_ipc_memory_region: memory at a5000000 {
- reg = <0x00 0xa5000000 0x00 0x1c00000>;
- alignment = <0x1000>;
- no-map;
- };
};
vmain_pd: regulator-0 {
@@ -788,107 +734,6 @@ &sdhci1 {
bootph-all;
};
-&mailbox0_cluster0 {
- status = "okay";
-
- mbox_wkup_r5_0: mbox-wkup-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster1 {
- status = "okay";
-
- mbox_mcu_r5_0: mbox-mcu-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster2 {
- status = "okay";
-
- mbox_c7x_0: mbox-c7x-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-};
-
-&mailbox0_cluster3 {
- status = "okay";
-
- mbox_main_r5_0: mbox-main-r5-0 {
- ti,mbox-rx = <0 0 0>;
- ti,mbox-tx = <1 0 0>;
- };
-
- mbox_c7x_1: mbox-c7x-1 {
- ti,mbox-rx = <2 0 0>;
- ti,mbox-tx = <3 0 0>;
- };
-};
-
-/* Timers are used by Remoteproc firmware */
-&main_timer0 {
- status = "reserved";
-};
-
-&main_timer1 {
- status = "reserved";
-};
-
-&main_timer2 {
- status = "reserved";
-};
-
-&wkup_r5fss0 {
- status = "okay";
-};
-
-&wkup_r5fss0_core0 {
- mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
- memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
- <&wkup_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&mcu_r5fss0 {
- status = "okay";
-};
-
-&mcu_r5fss0_core0 {
- mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
- memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
- <&mcu_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&main_r5fss0 {
- status = "okay";
-};
-
-&main_r5fss0_core0 {
- mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
- memory-region = <&main_r5fss0_core0_dma_memory_region>,
- <&main_r5fss0_core0_memory_region>;
- status = "okay";
-};
-
-&c7x_0 {
- mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
- memory-region = <&c7x_0_dma_memory_region>,
- <&c7x_0_memory_region>;
- status = "okay";
-};
-
-&c7x_1 {
- mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
- memory-region = <&c7x_1_dma_memory_region>,
- <&c7x_1_memory_region>;
- status = "okay";
-};
-
&serdes_ln_ctrl {
idle-states = <J722S_SERDES0_LANE0_USB>,
<J722S_SERDES1_LANE0_PCIE0_LANE0>;
@@ -999,3 +844,5 @@ &mcu_i2c0 {
clock-frequency = <400000>;
status = "okay";
};
+
+#include "k3-j722s-ti-ipc-firmware.dtsi"
diff --git a/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi
new file mode 100644
index 000000000000..cb7cd385a165
--- /dev/null
+++ b/arch/arm64/boot/dts/ti/k3-j722s-ti-ipc-firmware.dtsi
@@ -0,0 +1,163 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/**
+ * Device Tree Source for enabling IPC using TI SDK firmware on J722S SoCs
+ *
+ * Copyright (C) 2024-2025 Texas Instruments Incorporated - https://www.ti.com/
+ */
+
+&reserved_memory {
+ mcu_r5fss0_core0_dma_memory_region: memory at a1000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1000000 0x00 0x100000>;
+ no-map;
+ };
+
+ mcu_r5fss0_core0_memory_region: memory at a1100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa1100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_dma_memory_region: memory at a2000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2000000 0x00 0x100000>;
+ no-map;
+ };
+
+ main_r5fss0_core0_memory_region: memory at a2100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa2100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c7x_0_dma_memory_region: memory at a3000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c7x_0_memory_region: memory at a3100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa3100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ c7x_1_dma_memory_region: memory at a4000000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4000000 0x00 0x100000>;
+ no-map;
+ };
+
+ c7x_1_memory_region: memory at a4100000 {
+ compatible = "shared-dma-pool";
+ reg = <0x00 0xa4100000 0x00 0xf00000>;
+ no-map;
+ };
+
+ rtos_ipc_memory_region: memory at a5000000 {
+ reg = <0x00 0xa5000000 0x00 0x1c00000>;
+ alignment = <0x1000>;
+ no-map;
+ };
+};
+
+&mailbox0_cluster0 {
+ status = "okay";
+
+ mbox_wkup_r5_0: mbox-wkup-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster1 {
+ status = "okay";
+
+ mbox_mcu_r5_0: mbox-mcu-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster2 {
+ status = "okay";
+
+ mbox_c7x_0: mbox-c7x-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+};
+
+&mailbox0_cluster3 {
+ status = "okay";
+
+ mbox_main_r5_0: mbox-main-r5-0 {
+ ti,mbox-rx = <0 0 0>;
+ ti,mbox-tx = <1 0 0>;
+ };
+
+ mbox_c7x_1: mbox-c7x-1 {
+ ti,mbox-rx = <2 0 0>;
+ ti,mbox-tx = <3 0 0>;
+ };
+};
+
+/* Timers are used by Remoteproc firmware */
+&main_timer0 {
+ status = "reserved";
+};
+
+&main_timer1 {
+ status = "reserved";
+};
+
+&main_timer2 {
+ status = "reserved";
+};
+
+&wkup_r5fss0 {
+ status = "okay";
+};
+
+&wkup_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster0 &mbox_wkup_r5_0>;
+ memory-region = <&wkup_r5fss0_core0_dma_memory_region>,
+ <&wkup_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&mcu_r5fss0 {
+ status = "okay";
+};
+
+&mcu_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster1 &mbox_mcu_r5_0>;
+ memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
+ <&mcu_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&main_r5fss0 {
+ status = "okay";
+};
+
+&main_r5fss0_core0 {
+ mboxes = <&mailbox0_cluster3 &mbox_main_r5_0>;
+ memory-region = <&main_r5fss0_core0_dma_memory_region>,
+ <&main_r5fss0_core0_memory_region>;
+ status = "okay";
+};
+
+&c7x_0 {
+ mboxes = <&mailbox0_cluster2 &mbox_c7x_0>;
+ memory-region = <&c7x_0_dma_memory_region>,
+ <&c7x_0_memory_region>;
+ status = "okay";
+};
+
+&c7x_1 {
+ mboxes = <&mailbox0_cluster3 &mbox_c7x_1>;
+ memory-region = <&c7x_1_dma_memory_region>,
+ <&c7x_1_memory_region>;
+ status = "okay";
+};
--
2.34.1
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