[PATCH v2 2/2] arm64: dts: ti: k3-j784s4-j742s2-main-common: Update DSS EDP integration configuration register

[Harikrishna Shenoy]

On 9/8/25 10:07, Beleswar Prasad Padhi wrote:
> On 07/09/25 23:58, Harikrishna Shenoy wrote:
>> Fix size of DSS_EDP0_INT_CFG_VP to 256B as stated in
>> TRM Table 2-1 MAIN Domain Memory Map.
>> Link:https://www.ti.com/lit/zip/spruj52/SPRUJ52-J84S4 AM69A TRM
>
> Broken link

https://www.ti.com/lit/zip/spruj52 , this link will download the zip and refer the SPRUJ52-J84S4 AM69A TRM.

>
>> Fixes: 9cc161a4509c ("arm64: dts: ti: Refactor J784s4 SoC files to a common file")
>
> Above commit only refactored the changes and carried the bug.
> The commit that introduced this bug should be:
>
> 603669b16701 arm64: dts: ti: k3-j784s4-main: Add DSS and DP-bridge node
>
> Thanks,
> Beleswar
Noted
>> Signed-off-by: Harikrishna Shenoy <h-shenoy at ti.com>
>> ---
>>   arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> index fbbe768e7a30..f0cda14c2530 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi
>> @@ -2573,7 +2573,7 @@ port at 1 {
>>   	mhdp: bridge at a000000 {
>>   		compatible = "ti,j721e-mhdp8546";
>>   		reg = <0x0 0xa000000 0x0 0x30a00>,
>> -		      <0x0 0x4f40000 0x0 0x20>;
>> +		      <0x0 0x4f40000 0x0 0x100>;
>>   		reg-names = "mhdptx", "j721e-intg";
>>   		clocks = <&k3_clks 217 11>;
>>   		interrupt-parent = <&gic500>;