[PATCH v5 15/27] clk: mediatek: Add MT8196 ufssys clock support

Chen-Yu Tsai wenst at chromium.org
Thu Sep 4 23:36:35 PDT 2025


On Fri, Aug 29, 2025 at 5:21 PM Laura Nao <laura.nao at collabora.com> wrote:
>
> Add support for the MT8196 ufssys clock controller, which provides clock
> gate control for UFS.
>
> Co-developed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> Signed-off-by: Laura Nao <laura.nao at collabora.com>

Assuming the previous reviews for the bits are correct, the removal
of CLK_OPS_PARENT_ENABLE IMO is the right thing to do.

However if the hardware ends up does having a requirement that _some_
clock be enabled before touching the registers, then I think the
MTK clock library needs to be refactored, so that a register access
clock can be tied to the regmap. That might also require some work
on the syscon API.

Reviewed-by: Chen-Yu Tsai <wenst at chromium.org>



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