[PATCH v5 07/27] clk: mediatek: clk-gate: Add ops for gates with HW voter

[Chen-Yu Tsai]

On Fri, Aug 29, 2025 at 5:21 PM Laura Nao <laura.nao at collabora.com> wrote:
>
> MT8196 use a HW voter for gate enable/disable control. Voting is
> performed using set/clr regs, with a status bit used to verify the vote
> state. Add new set of gate clock operations with support for voting via
> set/clr regs.
>
> Reviewed-by: Nícolas F. R. A. Prado <nfraprado at collabora.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>
> Signed-off-by: Laura Nao <laura.nao at collabora.com>

Reviewed-by: Chen-Yu Tsai <wenst at chromium.org>