[PATCH 1/2] arm64: dts: ti: k3-am62p/j722s: Move sdhci0 from common

[Nishanth Menon]

On 19:47-20250903, Judith Mendez wrote:
> Since eMMC HS400 has been descoped for j722s due to errata i2478 [0]
> and is supported for am62p SR1.2 device, remove sdhci0 node from
> common-main.dtsi and include instead in each device's main.dtsi
> appropriately.
> 
> [0] https://www.ti.com/lit/pdf/sprz575
> Signed-off-by: Judith Mendez <jm at ti.com>
> ---
>  .../dts/ti/k3-am62p-j722s-common-main.dtsi    | 25 -------------------
>  arch/arm64/boot/dts/ti/k3-am62p-main.dtsi     | 25 +++++++++++++++++++
>  arch/arm64/boot/dts/ti/k3-j722s-main.dtsi     | 22 ++++++++++++++++
>  3 files changed, 47 insertions(+), 25 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> index 4427b12058a6..84083f5125df 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi
> @@ -566,31 +566,6 @@ main_gpio1: gpio at 601000 {
>  		clock-names = "gpio";
>  	};
>  
> -	sdhci0: mmc at fa10000 {
> -		compatible = "ti,am64-sdhci-8bit";
> -		reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
> -		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> -		power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
> -		clock-names = "clk_ahb", "clk_xin";
> -		bus-width = <8>;
> -		mmc-ddr-1_8v;
> -		mmc-hs200-1_8v;
> -		mmc-hs400-1_8v;
> -		ti,clkbuf-sel = <0x7>;
> -		ti,strobe-sel = <0x77>;
> -		ti,trm-icp = <0x8>;
> -		ti,otap-del-sel-legacy = <0x1>;
> -		ti,otap-del-sel-mmc-hs = <0x1>;
> -		ti,otap-del-sel-ddr52 = <0x6>;
> -		ti,otap-del-sel-hs200 = <0x8>;
> -		ti,otap-del-sel-hs400 = <0x5>;

would'nt it be sufficient to provide this in am62p and keep the common
stuff here?

Additionally handling of SR1.2 should be documented in am62p

> -		ti,itap-del-sel-legacy = <0x10>;
> -		ti,itap-del-sel-mmc-hs = <0xa>;
> -		ti,itap-del-sel-ddr52 = <0x3>;
> -		status = "disabled";
> -	};
> -
>  	sdhci1: mmc at fa00000 {
>  		compatible = "ti,am62-sdhci";
>  		reg = <0x00 0x0fa00000 0x00 0x1000>, <0x00 0x0fa08000 0x00 0x400>;
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> index 6aea9d3f134e..fb8473ce403a 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-main.dtsi
> @@ -31,6 +31,31 @@ usb1: usb at 31100000 {
>  			snps,usb2-lpm-disable;
>  		};
>  	};
> +
> +	sdhci0: mmc at fa10000 {
> +		compatible = "ti,am64-sdhci-8bit";
> +		reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
> +		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> +		power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
> +		clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
> +		clock-names = "clk_ahb", "clk_xin";
> +		bus-width = <8>;
> +		mmc-ddr-1_8v;
> +		mmc-hs200-1_8v;
> +		mmc-hs400-1_8v;
> +		ti,clkbuf-sel = <0x7>;
> +		ti,strobe-sel = <0x77>;
> +		ti,trm-icp = <0x8>;
> +		ti,otap-del-sel-legacy = <0x1>;
> +		ti,otap-del-sel-mmc-hs = <0x1>;
> +		ti,otap-del-sel-ddr52 = <0x6>;
> +		ti,otap-del-sel-hs200 = <0x8>;
> +		ti,otap-del-sel-hs400 = <0x5>;
> +		ti,itap-del-sel-legacy = <0x10>;
> +		ti,itap-del-sel-mmc-hs = <0xa>;
> +		ti,itap-del-sel-ddr52 = <0x3>;
> +		status = "disabled";
> +	};
>  };
>  
>  &oc_sram {
> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> index 993828872dfb..2978fe1a151e 100644
> --- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi
> @@ -404,6 +404,28 @@ e5010: jpeg-encoder at fd20000 {
>  		power-domains = <&k3_pds 201 TI_SCI_PD_EXCLUSIVE>;
>  		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
>  	};
> +
> +	sdhci0: mmc at fa10000 {
> +		compatible = "ti,am64-sdhci-8bit";
> +		reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
> +		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> +		power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
> +		clocks = <&k3_clks 57 1>, <&k3_clks 57 2>;
> +		clock-names = "clk_ahb", "clk_xin";
> +		bus-width = <8>;
> +		mmc-ddr-1_8v;
> +		mmc-hs200-1_8v;
> +		ti,clkbuf-sel = <0x7>;
> +		ti,trm-icp = <0x8>;
> +		ti,otap-del-sel-legacy = <0x1>;
> +		ti,otap-del-sel-mmc-hs = <0x1>;
> +		ti,otap-del-sel-ddr52 = <0x6>;
> +		ti,otap-del-sel-hs200 = <0x8>;
> +		ti,itap-del-sel-legacy = <0x10>;
> +		ti,itap-del-sel-mmc-hs = <0xa>;
> +		ti,itap-del-sel-ddr52 = <0x3>;
> +		status = "disabled";
> +	};
>  };
>  
>  &main_bcdma_csi {
> -- 
> 2.51.0
> 

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D
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