[PATCH 3/8] ARM: dts: bcm63148: Fix RNG IRQ

[William Zhang]

On Mon, Sep 1, 2025 at 5:50 AM Linus Walleij <linus.walleij at linaro.org> wrote:
>
> The BCM63148 RNG is at IRS_TABLE3_OFFSET at 94 so
> the IRQ is at 94+21 = 115.
>
TABLE3 offset 96.  96 + 21 - 32 = 85.  Original value is correct.
When in doubt,  you can always cross check
the uart0 interrupt definition.

> Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
> ---
>  arch/arm/boot/dts/broadcom/bcm63148.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/broadcom/bcm63148.dtsi b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> index e071cddb28fc2888b8f408b4bc275290dd135642..d94da16ab799c0ab25946e9cf24ae25812e85817 100644
> --- a/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> +++ b/arch/arm/boot/dts/broadcom/bcm63148.dtsi
> @@ -152,7 +152,7 @@ gpio4: gpio at 110 {
>                 rng at 300 {
>                         compatible = "brcm,iproc-rng200";
>                         reg = <0x300 0x28>;
> -                       interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
> +                       interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
>                 };
>
>                 uart0: serial at 600 {
>
> --
> 2.50.1
>
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