[PATCH] iio: xilinx-ams: Fix AMS_ALARM_THR_DIRECT_MASK

Jonathan Cameron jic23 at kernel.org
Mon Aug 25 04:24:25 PDT 2025


On Wed, 20 Aug 2025 12:31:12 +0000
"O'Griofa, Conall" <conall.ogriofa at amd.com> wrote:

> Hi,
> 
> Good spot, thanks again!
Applied to the fixes-togreg branch of iio.git and marked for stable.
Thanks,

Jonathan

> 
> Cheers,
> Conall.
> 
> > -----Original Message-----
> > From: Sean Anderson <sean.anderson at linux.dev>
> > Sent: 15 July 2025 01:31
> > To: Anand Ashok Dumbre <anand.ashok.dumbre at xilinx.com>; Jonathan Cameron
> > <jic23 at kernel.org>; linux-iio at vger.kernel.org
> > Cc: Andy Shevchenko <andy at kernel.org>; linux-kernel at vger.kernel.org; Simek,
> > Michal <michal.simek at amd.com>; linux-arm-kernel at lists.infradead.org; David
> > Lechner <dlechner at baylibre.com>; Manish Narani <manish.narani at xilinx.com>;
> > Nuno Sá <nuno.sa at analog.com>; Sean Anderson <sean.anderson at linux.dev>
> > Subject: [PATCH] iio: xilinx-ams: Fix AMS_ALARM_THR_DIRECT_MASK
> > 
> > AMS_ALARM_THR_DIRECT_MASK should be bit 0, not bit 1. This would cause
> > hysteresis to be enabled with a lower threshold of -28C. The temperature alarm
> > would never deassert even if the temperature dropped below the upper threshold.
> > 
> > Fixes: d5c70627a794 ("iio: adc: Add Xilinx AMS driver")
> > Signed-off-by: Sean Anderson <sean.anderson at linux.dev>
> > ---
> > 
> >  drivers/iio/adc/xilinx-ams.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c index
> > 76dd0343f5f7..552190dd0e6e 100644
> > --- a/drivers/iio/adc/xilinx-ams.c
> > +++ b/drivers/iio/adc/xilinx-ams.c
> > @@ -118,7 +118,7 @@
> >  #define AMS_ALARM_THRESHOLD_OFF_10	0x10
> >  #define AMS_ALARM_THRESHOLD_OFF_20	0x20
> > 
> > -#define AMS_ALARM_THR_DIRECT_MASK	BIT(1)
> > +#define AMS_ALARM_THR_DIRECT_MASK	BIT(0)
> >  #define AMS_ALARM_THR_MIN		0x0000
> >  #define AMS_ALARM_THR_MAX		(BIT(16) - 1)
> > 
> > --
> > 2.35.1.1320.gc452695387.dirty  
> 
> Reviewed-by: O'Griofa, Conall <conall.ogriofa at amd.com>




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