[PATCH v2 3/4] Documentation: KVM: arm64: Add GICD_TYPER.num_LPIs writable description

Zhou Wang wangzhou1 at hisilicon.com
Sun Aug 24 19:39:53 PDT 2025


Add GICD_TYPER.num_LPIs writable description.

Signed-off-by: Zhou Wang <wangzhou1 at hisilicon.com>
---
 Documentation/virt/kvm/devices/arm-vgic-v3.rst | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/Documentation/virt/kvm/devices/arm-vgic-v3.rst b/Documentation/virt/kvm/devices/arm-vgic-v3.rst
index ff02102f7141..f4bd63e10b99 100644
--- a/Documentation/virt/kvm/devices/arm-vgic-v3.rst
+++ b/Documentation/virt/kvm/devices/arm-vgic-v3.rst
@@ -127,6 +127,7 @@ Groups:
 
       * GICD_IIDR.Revision
       * GICD_TYPER2.nASSGIcap
+      * GICD_TYPER.num_LPIs
 
     GICD_IIDR.Revision is updated when the KVM implementation is changed in a
     way directly observable by the guest or userspace.  Userspace should read
@@ -142,6 +143,11 @@ Groups:
     to determine the supported value(s) before writing to the field.
 
 
+    GICD_TYPER.num_LPIs allows userspace to control the maximum value of
+    supported LPIs. At VGIC creation the field resets to 0 which indicates
+    maximum value of supported LPIs is defined by GICD.IDbits.
+
+
     The GICD_STATUSR and GICR_STATUSR registers are architecturally defined such
     that a write of a clear bit has no effect, whereas a write with a set bit
     clears that value.  To allow userspace to freely set the values of these two
-- 
2.33.0




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