[PATCH v2 1/2] arm64: dts: ti: k3-am62a-main: Fix pinctrl properties

[Paresh Bhagat]

From: Vibhore Vardhan <vibhore at ti.com>

Correct reg length to match end address - start address for main
PADCFG registers. The last physical address for the main pad
configuration registers (MAIN_PADCFG_CTRL_MMR_CFG0_PADCONFIG150) is
0x000f4258. Adding 4 bytes gives 0x000f425c, so the size in device
tree should be defined as 0x25c instead of 0x2ac.

Reference Docs
TRM (AM62A) - https://www.ti.com/lit/ug/spruj16b/spruj16b.pdf
TRM (AM62D) - https://www.ti.com/lit/ug/sprujd4/sprujd4.pdf

Fixes: 5fc6b1b62639c ("arm64: dts: ti: Introduce AM62A7 family of SoCs")
Cc: <stable at vger.kernel.org>
Signed-off-by: Vibhore Vardhan <vibhore at ti.com>
Signed-off-by: Paresh Bhagat <p-bhagat at ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index 9cad79d7bbc1..260279702c01 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -267,7 +267,7 @@ secure_proxy_sa3: mailbox at 43600000 {
 
 	main_pmx0: pinctrl at f4000 {
 		compatible = "pinctrl-single";
-		reg = <0x00 0xf4000 0x00 0x2ac>;
+		reg = <0x00 0xf4000 0x00 0x25c>;
 		#pinctrl-cells = <1>;
 		pinctrl-single,register-width = <32>;
 		pinctrl-single,function-mask = <0xffffffff>;
-- 
2.34.1