[PATCH v3 2/6] KVM: arm64: Handle RASv1p1 registers

[Ben Horgan]

Hi Marc,

On 8/21/25 14:37, Marc Zyngier wrote:
> On Thu, 21 Aug 2025 14:13:52 +0100,
> Ben Horgan <ben.horgan at arm.com> wrote:
>>
>>> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
>>> index 82ffb3b3b3cf7..feb1a7a708e25 100644
>>> --- a/arch/arm64/kvm/sys_regs.c
>>> +++ b/arch/arm64/kvm/sys_regs.c
>>> @@ -2697,6 +2697,18 @@ static bool access_ras(struct kvm_vcpu *vcpu,
>>>   	struct kvm *kvm = vcpu->kvm;
>>>     	switch(reg_to_encoding(r)) {
>>> +	case SYS_ERXPFGCDN_EL1:
>>> +	case SYS_ERXPFGCTL_EL1:
>>> +	case SYS_ERXPFGF_EL1:
>>> +	case SYS_ERXMISC2_EL1:
>>> +	case SYS_ERXMISC3_EL1:
>>> +		if (!(kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, V1P1) ||
>>> +		      (kvm_has_feat_enum(kvm, ID_AA64PFR0_EL1, RAS, IMP) &&
>>> +		       kvm_has_feat(kvm, ID_AA64PFR1_EL1, RAS_frac, RASv1p1)))) {
>>> +			kvm_inject_undefined(vcpu);
>>> +			return false;
>>> +		}
>>> +		break;
>>>   	default:
>>>   		if (!kvm_has_feat(kvm, ID_AA64PFR0_EL1, RAS, IMP)) {
>>>   			kvm_inject_undefined(vcpu);
>> The default condition needs updating for the case when
>> ID_AA64PFR0_EL1.RAS = b10 otherwise access to the non-v1 specific RAS
>> registers will result in an UNDEF being injected.
> 
> I don't think so. The RAS field is described as such:
> 
> 	UnsignedEnum    31:28   RAS
> 	        0b0000  NI
>         	0b0001  IMP
> 	        0b0010  V1P1
> 	        0b0011  V2
> 	EndEnum
> 
> Since this is an unsigned enum, this checks for a value < IMP. Only
> RAS not being implemented is this condition satisfied, and an UNDEF
> injected.
> 
> Or am I missing something obvious here (I wouldn't be surprised...)?

No, you are indeed correct. I missed the difference between
kvm_has_feat_enum() and kvm_has_feat(). Sorry for the noise.

> 
> 	M.
> 

-- 
Thanks,

Ben