[PATCH v3 5/8] mmc: sdhci: add Black Sesame Technologies BST C1200 controller driver

[Arnd Bergmann]

On Mon, Aug 18, 2025, at 12:48, Ulf Hansson wrote:
> On Tue, 12 Aug 2025 at 14:31, Albert Yang <yangzh0906 at thundersoft.com> wrote:

>> +       /*
>> +        * Silicon constraints for BST C1200:
>> +        * - System RAM base is 0x800000000 (above 32-bit addressable range)
>> +        * - The eMMC controller DMA engine is limited to 32-bit addressing
>> +        * - SMMU cannot be used on this path due to hardware design flaws
>> +        * - These are fixed in silicon and cannot be changed in software
>> +        *
>> +        * Bus/controller mapping:
>> +        * - No registers are available to reprogram the address mapping
>> +        * - The 32-bit DMA limit is a hard constraint of the controller IP
>> +        *
>> +        * Given these constraints, an SRAM-based bounce buffer in the 32-bit
>> +        * address space is required to enable eMMC DMA on this platform.
>> +        */
>> +       err = bst_sdhci_reallocate_bounce_buffer(host);
>> +       if (err) {
>> +               dev_err(&pdev->dev, "Failed to allocate bounce buffer: %d\n", err);
>> +               goto err_remove_host;
>> +       }
>
> FYI, I will be awaiting a confirmation from Arnd to be with the above
> hack, before I queue this up.

The explanations here are clear enough to me,

Acked-by: Arnd Bergmann <arnd at arndb.de>