[PATCH 3/3] arm64: zynqmp: Add support for kd240 board

[Rob Herring]

On Fri, Jul 18, 2025 at 6:24 AM Michal Simek <michal.simek at amd.com> wrote:
>
> The kit is using k24 SOM by default and it is used for motor control and
> DSP applications.
>
> K24 SOM is also possible to used with kv260 and kr260 CC which are also
> wired in Makefile.
>
> Signed-off-by: Michal Simek <michal.simek at amd.com>
> ---
>
> https://www.amd.com/en/products/system-on-modules/kria/k24/k24i-industrial.html
> https://www.amd.com/en/products/system-on-modules/kria/k24/kd240-drives-starter-kit.html
>
> ---
>  arch/arm64/boot/dts/xilinx/Makefile           |  15 +
>  .../boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso | 390 ++++++++++++++++++
>  .../boot/dts/xilinx/zynqmp-sm-k24-revA.dts    |  23 ++
>  .../boot/dts/xilinx/zynqmp-smk-k24-revA.dts   |  21 +
>  4 files changed, 449 insertions(+)
>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso
>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-sm-k24-revA.dts
>  create mode 100644 arch/arm64/boot/dts/xilinx/zynqmp-smk-k24-revA.dts
>
> diff --git a/arch/arm64/boot/dts/xilinx/Makefile b/arch/arm64/boot/dts/xilinx/Makefile
> index 5e84e3c725e2..70fac0b276df 100644
> --- a/arch/arm64/boot/dts/xilinx/Makefile
> +++ b/arch/arm64/boot/dts/xilinx/Makefile
> @@ -39,4 +39,19 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kr-g-revA.dtb
>  zynqmp-smk-k26-revA-sck-kr-g-revB-dtbs := zynqmp-smk-k26-revA.dtb zynqmp-sck-kr-g-revB.dtbo
>  dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k26-revA-sck-kr-g-revB.dtb
>
> +zynqmp-sm-k24-revA-sck-kd-g-revA-dtbs := zynqmp-sm-k24-revA.dtb zynqmp-sck-kd-g-revA.dtbo
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kd-g-revA.dtb
> +zynqmp-smk-k24-revA-sck-kd-g-revA-dtbs := zynqmp-smk-k24-revA.dtb zynqmp-sck-kd-g-revA.dtbo
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kd-g-revA.dtb
> +
> +zynqmp-sm-k24-revA-sck-kv-g-revB-dtbs := zynqmp-sm-k24-revA.dtb zynqmp-sck-kv-g-revB.dtbo
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kv-g-revB.dtb
> +zynqmp-smk-k24-revA-sck-kv-g-revB-dtbs := zynqmp-smk-k24-revA.dtb zynqmp-sck-kv-g-revB.dtbo
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kv-g-revB.dtb
> +
> +zynqmp-sm-k24-revA-sck-kr-g-revB-dtbs := zynqmp-sm-k24-revA.dtb zynqmp-sck-kr-g-revB.dtbo
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kr-g-revB.dtb
> +zynqmp-smk-k24-revA-sck-kr-g-revB-dtbs := zynqmp-smk-k24-revA.dtb zynqmp-sck-kr-g-revB.dtbo
> +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kr-g-revB.dtb
> +
>  dtb-$(CONFIG_ARCH_ZYNQMP) += versal-net-vn-x-b2197-01-revA.dtb
> diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso
> new file mode 100644
> index 000000000000..02be5e1e8686
> --- /dev/null
> +++ b/arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso
> @@ -0,0 +1,390 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * dts file for KD240 revA Carrier Card
> + *
> + * Copyright (C) 2021 - 2022, Xilinx, Inc.
> + * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc.
> + *
> + * Michal Simek <michal.simek at amd.com>
> + */
> +
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/phy/phy.h>
> +#include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
> +
> +/dts-v1/;
> +/plugin/;
> +
> +&{/} {
> +       compatible = "xlnx,zynqmp-sk-kd240-rev1",
> +                    "xlnx,zynqmp-sk-kd240-revB",
> +                    "xlnx,zynqmp-sk-kd240-revA",
> +                    "xlnx,zynqmp-sk-kd240", "xlnx,zynqmp";
> +       model = "ZynqMP KD240 revA/B/1";
> +
> +       aliases {
> +               ethernet0 = "/axi/ethernet at ff0c0000"; /* &gem1 */
> +       };
> +
> +       ina260-u3 {
> +               compatible = "iio-hwmon";
> +               io-channels = <&u3 0>, <&u3 1>, <&u3 2>;
> +       };
> +
> +       clk_26: clock2 { /* u17 - USB */
> +               compatible = "fixed-clock";
> +               #clock-cells = <0>;
> +               clock-frequency = <26000000>;
> +       };
> +
> +       clk_25_0: clock4 { /* u92/u91 - GEM2 */
> +               compatible = "fixed-clock";
> +               #clock-cells = <0>;
> +               clock-frequency = <25000000>;
> +       };
> +
> +       clk_25_1: clock5 { /* u92/u91 - GEM3 */
> +               compatible = "fixed-clock";
> +               #clock-cells = <0>;
> +               clock-frequency = <25000000>;
> +       };
> +};
> +
> +&can0 {
> +       status = "okay";
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_can0_default>;
> +};
> +
> +&i2c1 { /* I2C_SCK C26/C27 - MIO from SOM */
> +       #address-cells = <1>;
> +       #size-cells = <0>;
> +       pinctrl-names = "default", "gpio";
> +       pinctrl-0 = <&pinctrl_i2c1_default>;
> +       pinctrl-1 = <&pinctrl_i2c1_gpio>;
> +       scl-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> +       sda-gpios = <&gpio 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> +
> +       u3: ina260 at 40 { /* u3 */
> +               compatible = "ti,ina260";
> +               #io-channel-cells = <1>;
> +               label = "ina260-u14";
> +               reg = <0x40>;
> +       };
> +
> +       slg7xl45106: gpio at 11 { /* u13 - reset logic */
> +               compatible = "dlg,slg7xl45106";
> +               reg = <0x11>;
> +               label = "resetchip";

'label' is not a documented property for this binding. Please drop.
"dtbs_check" reports this.

Rob