[PATCH V2 7/7] arm64: dts: ti: k3-am62a-main: Add interrupts property

[Yemike Abhilash Chandra]

Add interrupts property for CDNS CSI2RX. Interrupt IDs are taken from the
AM62A TRM [0].

Interrupt Line             | Source Interrupt
---------------------------|----------------------------------
GICSS0_COMMON_0_SPI_IN_175 | CSI_RX_IF0_COMMON_0_CSI_ERR_IRQ_0
GICSS0_COMMON_0_SPI_IN_173 | CSI_RX_IF0_COMMON_0_CSI_IRQ_0

[0]: https://www.ti.com/lit/pdf/spruj16

Signed-off-by: Yemike Abhilash Chandra <y-abhilashchandra at ti.com>
Reviewed-by: Udit Kumar <u-kumar1 at ti.com>
Reviewed-by: Jared McArthur <j-mcarthur at ti.com>
---
 arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index 44e7e459f176..9cad79d7bbc1 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -1054,6 +1054,9 @@ ti_csi2rx0: ticsi2rx at 30102000 {
 		cdns_csi2rx0: csi-bridge at 30101000 {
 			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
 			reg = <0x00 0x30101000 0x00 0x1000>;
+			interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error_irq", "irq";
 			clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>,
 				<&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>;
 			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
-- 
2.34.1