[arm-platforms:hack/arch_timer_mmio 4/5] drivers/clocksource/arm_arch_timer_mmio.c:73:4: error: call to undeclared function 'writeq_relaxed'; ISO C99 and later do not support implicit function declarations
kernel test robot
lkp at intel.com
Thu Aug 7 02:51:46 PDT 2025
tree: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git hack/arch_timer_mmio
head: 4b341bbc18d791b6c5a6bc373d303c4d3b35434a
commit: d094e2d0772b8f22c47c9d3e7ab908c82ade83bf [4/5] clocksource/drivers/arm_arch_timer_mmio: Switch over to standalone driver
config: arm-axm55xx_defconfig (https://download.01.org/0day-ci/archive/20250807/202508071719.gt7HNCye-lkp@intel.com/config)
compiler: clang version 22.0.0git (https://github.com/llvm/llvm-project 7b8dea265e72c3037b6b1e54d5ab51b7e14f328b)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250807/202508071719.gt7HNCye-lkp@intel.com/reproduce)
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp at intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202508071719.gt7HNCye-lkp@intel.com/
All errors (new ones prefixed by >>):
>> drivers/clocksource/arm_arch_timer_mmio.c:73:4: error: call to undeclared function 'writeq_relaxed'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
73 | writeq_relaxed(val, timer->base + CNTP_CVAL_LO);
| ^
drivers/clocksource/arm_arch_timer_mmio.c:84:4: error: call to undeclared function 'writeq_relaxed'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
84 | writeq_relaxed(val, timer->base + CNTV_CVAL_LO);
| ^
drivers/clocksource/arm_arch_timer_mmio.c:262:54: warning: implicit conversion from 'unsigned long long' to 'unsigned long' changes value from 72057594037927935 to 4294967295 [-Wconstant-conversion]
262 | clockevents_config_and_register(clk, at->rate, 0xf, CLOCKSOURCE_MASK(56));
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^~~~~~~~~~~~~~~~~~~~
include/linux/clocksource.h:153:32: note: expanded from macro 'CLOCKSOURCE_MASK'
153 | #define CLOCKSOURCE_MASK(bits) GENMASK_ULL((bits) - 1, 0)
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
include/linux/bits.h:89:29: note: expanded from macro 'GENMASK_ULL'
89 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK_ULL(h, l))
| ~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~
1 warning and 2 errors generated.
vim +/writeq_relaxed +73 drivers/clocksource/arm_arch_timer_mmio.c
9920c260a9b738 Marc Zyngier 2025-08-06 55
9920c260a9b738 Marc Zyngier 2025-08-06 56 static void arch_timer_reg_write(enum arch_timer_access access,
9920c260a9b738 Marc Zyngier 2025-08-06 57 enum arch_timer_reg reg, u64 val,
9920c260a9b738 Marc Zyngier 2025-08-06 58 struct clock_event_device *clk)
9920c260a9b738 Marc Zyngier 2025-08-06 59 {
9920c260a9b738 Marc Zyngier 2025-08-06 60 struct arch_timer *timer = evt_to_arch_timer(clk);
9920c260a9b738 Marc Zyngier 2025-08-06 61
9920c260a9b738 Marc Zyngier 2025-08-06 62 switch (access) {
9920c260a9b738 Marc Zyngier 2025-08-06 63 case PHYS_ACCESS:
9920c260a9b738 Marc Zyngier 2025-08-06 64 switch (reg) {
9920c260a9b738 Marc Zyngier 2025-08-06 65 case ARCH_TIMER_REG_CTRL:
9920c260a9b738 Marc Zyngier 2025-08-06 66 writel_relaxed((u32)val, timer->base + CNTP_CTL);
9920c260a9b738 Marc Zyngier 2025-08-06 67 return;
9920c260a9b738 Marc Zyngier 2025-08-06 68 case ARCH_TIMER_REG_CVAL:
9920c260a9b738 Marc Zyngier 2025-08-06 69 /*
9920c260a9b738 Marc Zyngier 2025-08-06 70 * Not guaranteed to be atomic, so the timer
9920c260a9b738 Marc Zyngier 2025-08-06 71 * must be disabled at this point.
9920c260a9b738 Marc Zyngier 2025-08-06 72 */
9920c260a9b738 Marc Zyngier 2025-08-06 @73 writeq_relaxed(val, timer->base + CNTP_CVAL_LO);
9920c260a9b738 Marc Zyngier 2025-08-06 74 return;
9920c260a9b738 Marc Zyngier 2025-08-06 75 }
9920c260a9b738 Marc Zyngier 2025-08-06 76 break;
9920c260a9b738 Marc Zyngier 2025-08-06 77 case VIRT_ACCESS:
9920c260a9b738 Marc Zyngier 2025-08-06 78 switch (reg) {
9920c260a9b738 Marc Zyngier 2025-08-06 79 case ARCH_TIMER_REG_CTRL:
9920c260a9b738 Marc Zyngier 2025-08-06 80 writel_relaxed((u32)val, timer->base + CNTV_CTL);
9920c260a9b738 Marc Zyngier 2025-08-06 81 return;
9920c260a9b738 Marc Zyngier 2025-08-06 82 case ARCH_TIMER_REG_CVAL:
9920c260a9b738 Marc Zyngier 2025-08-06 83 /* Same restriction as above */
9920c260a9b738 Marc Zyngier 2025-08-06 84 writeq_relaxed(val, timer->base + CNTV_CVAL_LO);
9920c260a9b738 Marc Zyngier 2025-08-06 85 return;
9920c260a9b738 Marc Zyngier 2025-08-06 86 }
9920c260a9b738 Marc Zyngier 2025-08-06 87 break;
9920c260a9b738 Marc Zyngier 2025-08-06 88 }
9920c260a9b738 Marc Zyngier 2025-08-06 89
9920c260a9b738 Marc Zyngier 2025-08-06 90 /* Should never be here */
9920c260a9b738 Marc Zyngier 2025-08-06 91 WARN_ON_ONCE(1);
9920c260a9b738 Marc Zyngier 2025-08-06 92 }
9920c260a9b738 Marc Zyngier 2025-08-06 93
:::::: The code at line 73 was first introduced by commit
:::::: 9920c260a9b73875557f4b2e6c9f68685b9c07e8 clocksource/drivers/arm_arch_timer: Add standalone MMIO driver
:::::: TO: Marc Zyngier <maz at kernel.org>
:::::: CC: Marc Zyngier <maz at kernel.org>
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