[PATCH v2 3/4] arm64: dts: qcom: add initial support for QCS8300 DTSI

[Bjorn Andersson]

On Wed, Sep 25, 2024 at 06:43:34PM +0800, Jingyi Wang wrote:
> Add initial DTSI for QCS8300 SoC.
> 
> Features added in this revision:
> - CPUs with PSCI idle states
> - Interrupt-controller with PDC wakeup support
> - Timers, TCSR Clock Controllers
> - Reserved Shared memory
> - GCC and RPMHCC
> - TLMM
> - Interconnect
> - QuP with uart
> - SMMU
> - QFPROM
> - Rpmhpd power controller
> - UFS
> - Inter-Processor Communication Controller
> - SRAM
> - Remoteprocs including ADSP,CDSP and GPDSP
> - BWMONs
> 
> [Zhenhua: added the smmu node]
> Co-developed-by: Zhenhua Huang <quic_zhenhuah at quicinc.com>
> Signed-off-by: Zhenhua Huang <quic_zhenhuah at quicinc.com>
> [Xin: added ufs/adsp/gpdsp nodes]
> Co-developed-by: Xin Liu <quic_liuxin at quicinc.com>
> Signed-off-by: Xin Liu <quic_liuxin at quicinc.com>
> [Kyle: added the aoss_qmp node]
> Co-developed-by: Kyle Deng <quic_chunkaid at quicinc.com>
> Signed-off-by: Kyle Deng <quic_chunkaid at quicinc.com>
> [Tingguo: added the rpmhpd nodes]
> Co-developed-by: Tingguo Cheng <quic_tingguoc at quicinc.com>
> Signed-off-by: Tingguo Cheng <quic_tingguoc at quicinc.com>
> [Raviteja: added interconnect nodes]
> Co-developed-by: Raviteja Laggyshetty <quic_rlaggysh at quicinc.com>
> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh at quicinc.com>
> Signed-off-by: Jingyi Wang <quic_jingyw at quicinc.com>

Sorry, thought I had replied to this already, but I must have confused
it with QCS615.

Please see my feedback regarding signed-off-by and subject line:
https://lore.kernel.org/all/4bhsuysjm2uwkk52g4pkspiadsf5y4m2afotj7ggo2lnj24ip2@yqkijcdkiloj/
https://lore.kernel.org/all/2qvv3zrop2i5hurrn7bfggfkjb7rqlbfa7bxiekdisi6c57gxd@d2fptisjhy3j/



For reference, here's the qcs615 v5.
https://lore.kernel.org/all/20241104-add_initial_support_for_qcs615-v5-0-9dde8d7b80b0@quicinc.com/

Regards,
Bjorn