[PATCH 1/3] arm64: dts: imx8mm: Describe carrier board 20 MHz Xtal on i.MX8MM Menlo board

[Marek Vasut]

The i.MX8MM Menlo carrier board uses dedicated 20 MHz Xtal to supply
clock to second SPI CAN controller on the carrier board as well as
CPLD on the same board. Fix incorrect reuse of SoM 20 MHz Xtal for
that purpose, describe the separate Xtal and use it.

Signed-off-by: Marek Vasut <marex at denx.de>
---
Cc: Conor Dooley <conor+dt at kernel.org>
Cc: Fabio Estevam <festevam at gmail.com>
Cc: Krzysztof Kozlowski <krzk+dt at kernel.org>
Cc: Pengutronix Kernel Team <kernel at pengutronix.de>
Cc: Rob Herring <robh at kernel.org>
Cc: Sascha Hauer <s.hauer at pengutronix.de>
Cc: Shawn Guo <shawnguo at kernel.org>
Cc: devicetree at vger.kernel.org
Cc: imx at lists.linux.dev
Cc: linux-arm-kernel at lists.infradead.org
---
 arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
index 0b123a84018b2..4c38979f7333f 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
@@ -14,6 +14,13 @@ / {
 		     "toradex,verdin-imx8mm",
 		     "fsl,imx8mm";
 
+	/* Carrier board Xtal for SPI CAN controller and CPLD */
+	clk20mcb: clk-20m-cb {
+		compatible = "fixed-clock";
+		#clock-cells = <0>;
+		clock-frequency = <20000000>;
+	};
+
 	/delete-node/ gpio-keys;
 
 	leds {
@@ -60,7 +67,7 @@ &ecspi1 {
 	/* CAN controller on the baseboard */
 	canfd: can at 0 {
 		compatible = "microchip,mcp2518fd";
-		clocks = <&clk_xtal20>;
+		clocks = <&clk20mcb>;
 		interrupt-parent = <&gpio1>;
 		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
 		reg = <0>;
-- 
2.43.0