[PATCH v7 11/14] iommu/arm-smmu-v3: Allow IDENTITY/BLOCKED to be set while PASID is used

[Nicolin Chen]

On Wed, May 08, 2024 at 03:57:19PM -0300, Jason Gunthorpe wrote:
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 15378c131a5bc7..41d7a0664a445d 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -991,6 +991,14 @@ void arm_smmu_get_ste_used(const __le64 *ent, __le64 *used_bits)
>  				    STRTAB_STE_1_S1STALLD | STRTAB_STE_1_STRW |
>  				    STRTAB_STE_1_EATS);
>  		used_bits[2] |= cpu_to_le64(STRTAB_STE_2_S2VMID);
> +
> +		/*
> +		 * See 13.5 Summary of attribute/permission configuration fields
> +		 * for the SHCFG behavior.
> +		 */
> +		if (FIELD_GET(STRTAB_STE_1_S1DSS, le64_to_cpu(ent[1])) ==
> +		    STRTAB_STE_1_S1DSS_BYPASS)
> +			used_bits[1] |= cpu_to_le64(STRTAB_STE_1_SHCFG);

Should we check ARM_SMMU_FEAT_ATTR_TYPES_OVR here as well? 

The SHCFG is RES0 when !ARM_SMMU_FEAT_ATTR_TYPES_OVR. So, the
used_bits[1] doesn't need to include it in this case?

Otherwise,

Reviewed-by: Nicolin Chen <nicolinc at nvidia.com>