[PATCH v5 10/17] RISC-V: define the elements of the VCSR vector CSR

Charlie Jenkins charlie at rivosinc.com
Thu May 2 21:46:45 PDT 2024


From: Heiko Stuebner <heiko at sntech.de>

The VCSR CSR contains two elements VXRM[2:1] and VXSAT[0].

Define constants for those to access the elements in a readable way.

Acked-by: Guo Ren <guoren at kernel.org>
Reviewed-by: Conor Dooley <conor.dooley at microchip.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner at vrull.eu>
Signed-off-by: Charlie Jenkins <charlie at rivosinc.com>
---
 arch/riscv/include/asm/csr.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h
index 2468c55933cd..13bc99c995d1 100644
--- a/arch/riscv/include/asm/csr.h
+++ b/arch/riscv/include/asm/csr.h
@@ -215,6 +215,11 @@
 #define SMSTATEEN0_SSTATEEN0_SHIFT	63
 #define SMSTATEEN0_SSTATEEN0		(_ULL(1) << SMSTATEEN0_SSTATEEN0_SHIFT)
 
+/* VCSR flags */
+#define VCSR_VXRM_MASK			3
+#define VCSR_VXRM_SHIFT			1
+#define VCSR_VXSAT_MASK			1
+
 /* symbolic CSR names: */
 #define CSR_CYCLE		0xc00
 #define CSR_TIME		0xc01

-- 
2.44.0




More information about the linux-arm-kernel mailing list