The audio support on J784S4-EVM is using PCM3168A[0] codec
connected to McASP0 serializers.
- Add the nodes for sound-card, audio codec, MAIN_I2C3 and
McASP0.
- Add pinmux for I2C3, McASP0 and AUDIO_EXT_REFCLK1.
- Add necessary GPIO hogs to route the MAIN_I2C3 lines and
McASP serializer.
- Add idle-state as 1 in mux1 to route McASP clock signals.
[0]: <https://www.ti.com/lit/gpn/pcm3168a>
Signed-off-by: Jayesh Choudhary <j-choudhary at ti.com>
---
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts | 111 +++++++++++++++++++++++
1 file changed, 111 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
index a4a6efcce362..9338d987180d 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-evm.dts
@@ -312,6 +312,20 @@ mux1: mux-controller {
compatible = "gpio-mux";
#mux-state-cells = <1>;
mux-gpios = <&exp2 14 GPIO_ACTIVE_HIGH>;
+ idle-state = <1>;
+ };
+
+ codec_audio: sound {
+ compatible = "ti,j7200-cpb-audio";
+ model = "j784s4-cpb";
+
+ ti,cpb-mcasp = <&mcasp0>;
+ ti,cpb-codec = <&pcm3168a_1>;
+
+ clocks = <&k3_clks 265 0>, <&k3_clks 265 1>,
+ <&k3_clks 157 34>, <&k3_clks 157 63>;
+ clock-names = "cpb-mcasp-auxclk", "cpb-mcasp-auxclk-48000",
+ "cpb-codec-scki", "cpb-codec-scki-48000";
};
};
@@ -422,6 +436,28 @@ main_usbss0_pins_default: main-usbss0-default-pins {
J784S4_IOPAD(0x0ec, PIN_OUTPUT, 6) /* (AN37) TIMER_IO1.USB0_DRVVBUS */
>;
};
+
+ main_i2c3_pins_default: main-i2c3-default-pins {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x064, PIN_INPUT, 13) /* (AF38) MCAN0_TX.I2C3_SCL */
+ J784S4_IOPAD(0x060, PIN_INPUT, 13) /* (AE36) MCASP2_AXR1.I2C3_SDA */
+ >;
+ };
+
+ main_mcasp0_pins_default: main-mcasp0-default-pins {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x038, PIN_OUTPUT_PULLDOWN, 1) /* (AK35) MCASP0_ACLKX */
+ J784S4_IOPAD(0x03c, PIN_OUTPUT_PULLDOWN, 1) /* (AK38) MCASP0_AFSX */
+ J784S4_IOPAD(0x07c, PIN_OUTPUT_PULLDOWN, 1) /* (AJ38) MCASP0_AXR3 */
+ J784S4_IOPAD(0x080, PIN_INPUT_PULLDOWN, 1) /* (AK34) MCASP0_AXR4 */
+ >;
+ };
+
+ audio_ext_refclk1_pins_default: audio-ext-refclk1-default-pins {
+ pinctrl-single,pins = <
+ J784S4_IOPAD(0x078, PIN_OUTPUT, 1) /* (AH37) MCAN2_RX.AUDIO_EXT_REFCLK1 */
+ >;
+ };
};
&wkup_pmx2 {
@@ -881,6 +917,14 @@ exp1: gpio at 20 {
"PCIE0_4L_RC_RSTZ", "PCIE0_4L_EP_RST_EN", "PCIE1_4L_PRSNT#",
"PCIE0_4L_PRSNT#", "CDCI1_OE1/OE4", "CDCI1_OE2/OE3",
"AUDIO_MUX_SEL", "EXP_MUX2", "EXP_MUX3", "GESI_EXP_PHY_RSTZ";
+
+ p12-hog {
+ /* P12 - AUDIO_MUX_SEL */
+ gpio-hog;
+ gpios = <12 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "AUDIO_MUX_SEL";
+ };
};
exp2: gpio at 22 {
@@ -896,6 +940,22 @@ exp2: gpio at 22 {
"CANUART_MUX1_SEL1", "ENET1_EXP_PWRDN", "ENET1_EXP_RESETZ",
"ENET1_I2CMUX_SEL", "ENET1_EXP_SPARE2", "ENET2_EXP_RESETZ",
"USER_INPUT1", "USER_LED1", "USER_LED2";
+
+ p13-hog {
+ /* P13 - CANUART_MUX_SEL0 */
+ gpio-hog;
+ gpios = <13 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "CANUART_MUX_SEL0";
+ };
+
+ p15-hog {
+ /* P15 - CANUART_MUX1_SEL1 */
+ gpio-hog;
+ gpios = <15 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "CANUART_MUX1_SEL1";
+ };
};
};
@@ -1373,3 +1433,54 @@ &pcie0_rc {
phys = <&serdes1_pcie0_link>;
phy-names = "pcie-phy";
};
+
+&k3_clks {
+ /* Confiure AUDIO_EXT_REFCLK1 pin as output */
+ pinctrl-names = "default";
+ pinctrl-0 = <&audio_ext_refclk1_pins_default>;
+};
+
+&main_i2c3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_i2c3_pins_default>;
+ clock-frequency = <400000>;
+
+ exp3: gpio at 20 {
+ compatible = "ti,tca6408";
+ reg = <0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ pcm3168a_1: audio-codec at 44 {
+ compatible = "ti,pcm3168a";
+ reg = <0x44>;
+ #sound-dai-cells = <1>;
+ reset-gpios = <&exp3 0 GPIO_ACTIVE_LOW>;
+ clocks = <&audio_refclk1>;
+ clock-names = "scki";
+ VDD1-supply = <&vsys_3v3>;
+ VDD2-supply = <&vsys_3v3>;
+ VCCAD1-supply = <&vsys_5v0>;
+ VCCAD2-supply = <&vsys_5v0>;
+ VCCDA1-supply = <&vsys_5v0>;
+ VCCDA2-supply = <&vsys_5v0>;
+ };
+};
+
+&mcasp0 {
+ status = "okay";
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_mcasp0_pins_default>;
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <2>;
+ auxclk-fs-ratio = <256>;
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 0 0 0 1
+ 2 0 0 0
+ 0 0 0 0
+ 0 0 0 0
+ >;
+};
--
2.25.1