[PATCH] arm64: dts: imx8mp: Fix pgc_mlmix location

[Adam Ford]

On Tue, Jun 18, 2024 at 1:15 AM Alexander Stein
<alexander.stein at ew.tq-group.com> wrote:
>
> Hi Adam,
>
> Am Dienstag, 18. Juni 2024, 00:39:51 CEST schrieb Adam Ford:
> > The pgc_mlmix shows a power-domain at 24, but the reg value is
> > IMX8MP_POWER_DOMAIN_MLMIX which is set to 4.
> >
> > The stuff after the @ symbol should match the stuff referenced
> > by 'reg' so reorder the pgc_mlmix so it to appear as power-domain at 4.
>
> Taking a look this mismatch seems to be also true for:
> * IMX8MP_POWER_DOMAIN_VPUMIX
> * IMX8MP_POWER_DOMAIN_VPU_G1
> * IMX8MP_POWER_DOMAIN_VPU_G2
> * IMX8MP_POWER_DOMAIN_VPU_VC8000E
>
> Would you mind fixing them as well?

I can do that.   I'll send out out later tonight.

adam
>
> Despite that, for this patch:
> Reviewed-by: Alexander Stein <alexander.stein at ew.tq-group.com>
>
> Thanks and best regards,
> Alexander
>
> > Fixes: 834464c8504c ("arm64: dts: imx8mp: add mlmix power domain")
> > Fixes: 4bedc468b725 ("arm64: dts: imx8mp: Add NPU Node")
> >
> > Signed-off-by: Adam Ford <aford173 at gmail.com>
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index b92abb5a5c53..3576d2b89b43 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -789,6 +789,23 @@ pgc_usb2_phy: power-domain at 3 {
> >                                               reg = <IMX8MP_POWER_DOMAIN_USB2_PHY>;
> >                                       };
> >
> > +                                     pgc_mlmix: power-domain at 4 {
> > +                                             #power-domain-cells = <0>;
> > +                                             reg = <IMX8MP_POWER_DOMAIN_MLMIX>;
> > +                                             clocks = <&clk IMX8MP_CLK_ML_AXI>,
> > +                                                      <&clk IMX8MP_CLK_ML_AHB>,
> > +                                                      <&clk IMX8MP_CLK_NPU_ROOT>;
> > +                                             assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,
> > +                                                               <&clk IMX8MP_CLK_ML_AXI>,
> > +                                                               <&clk IMX8MP_CLK_ML_AHB>;
> > +                                             assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
> > +                                                                      <&clk IMX8MP_SYS_PLL1_800M>,
> > +                                                                      <&clk IMX8MP_SYS_PLL1_800M>;
> > +                                             assigned-clock-rates = <800000000>,
> > +                                                                    <800000000>,
> > +                                                                    <300000000>;
> > +                                     };
> > +
> >                                       pgc_audio: power-domain at 5 {
> >                                               #power-domain-cells = <0>;
> >                                               reg = <IMX8MP_POWER_DOMAIN_AUDIOMIX>;
> > @@ -900,23 +917,6 @@ pgc_vpu_vc8000e: power-domain at 22 {
> >                                               reg = <IMX8MP_POWER_DOMAIN_VPU_VC8000E>;
> >                                               clocks = <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> >                                       };
> > -
> > -                                     pgc_mlmix: power-domain at 24 {
> > -                                             #power-domain-cells = <0>;
> > -                                             reg = <IMX8MP_POWER_DOMAIN_MLMIX>;
> > -                                             clocks = <&clk IMX8MP_CLK_ML_AXI>,
> > -                                                      <&clk IMX8MP_CLK_ML_AHB>,
> > -                                                      <&clk IMX8MP_CLK_NPU_ROOT>;
> > -                                             assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,
> > -                                                               <&clk IMX8MP_CLK_ML_AXI>,
> > -                                                               <&clk IMX8MP_CLK_ML_AHB>;
> > -                                             assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
> > -                                                                      <&clk IMX8MP_SYS_PLL1_800M>,
> > -                                                                      <&clk IMX8MP_SYS_PLL1_800M>;
> > -                                             assigned-clock-rates = <800000000>,
> > -                                                                    <800000000>,
> > -                                                                    <300000000>;
> > -                                     };
> >                               };
> >                       };
> >               };
> >
>
>
> --
> TQ-Systems GmbH | Mühlstraße 2, Gut Delling | 82229 Seefeld, Germany
> Amtsgericht München, HRB 105018
> Geschäftsführer: Detlef Schneider, Rüdiger Stahl, Stefan Schneider
> http://www.tq-group.com/
>
>