[PATCH v2 3/3] ARM: dts: stm32: add ethernet1 for STM32MP135F-DK board
Christophe Roullier
christophe.roullier at foss.st.com
Tue Jun 11 06:01:10 PDT 2024
Ethernet1: RMII with crystal
Ethernet2: RMII with no crystal, need "phy-supply" property to work,
today this property was managed by Ethernet glue, but should be present
and managed in PHY node. So I will push second Ethernet in next step.
PHYs used are SMSC (LAN8742A)
Signed-off-by: Christophe Roullier <christophe.roullier at foss.st.com>
Reviewed-by: Marek Vasut <marex at denx.de>
---
arch/arm/boot/dts/st/stm32mp135f-dk.dts | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
index 567e53ad285fa..cf65d09e89156 100644
--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
@@ -19,6 +19,7 @@ / {
compatible = "st,stm32mp135f-dk", "st,stm32mp135";
aliases {
+ ethernet0 = ðernet1;
serial0 = &uart4;
serial1 = &usart1;
serial2 = &uart8;
@@ -141,6 +142,28 @@ &cryp {
status = "okay";
};
+ðernet1 {
+ status = "okay";
+ pinctrl-0 = <ð1_rmii_pins_a>;
+ pinctrl-1 = <ð1_rmii_sleep_pins_a>;
+ pinctrl-names = "default", "sleep";
+ phy-mode = "rmii";
+ phy-handle = <&phy0_eth1>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+
+ phy0_eth1: ethernet-phy at 0 {
+ compatible = "ethernet-phy-id0007.c131";
+ reg = <0>;
+ reset-gpios = <&mcp23017 9 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ };
+ };
+};
+
&i2c1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c1_pins_a>;
--
2.25.1
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