[PATCH v5 6/7] arm64: dts: ti: k3-j722s-main: Add SERDES and PCIe support
Roger Quadros
rogerq at kernel.org
Thu Jun 6 01:04:41 PDT 2024
On 04/06/2024 11:52, Siddharth Vadapalli wrote:
> J722S SoC has two instances of SERDES namely SERDES0 and SERDES1 and one
> instance of PCIe namely PCIe0. Both SERDES0 and SERDES1 are single lane
> SERDES. The PCIe0 instance of PCIe is a Gen3 single lane PCIe controller.
>
> Since SERDES and PCIe are not present on AM62P SoC, add the device-tree
> nodes corresponding to them in the J722S SoC specific "k3-j722s-main.dtsi"
> file.
>
> Co-developed-by: Ravi Gunasekaran <r-gunasekaran at ti.com>
> Signed-off-by: Ravi Gunasekaran <r-gunasekaran at ti.com>
> Signed-off-by: Siddharth Vadapalli <s-vadapalli at ti.com>
Acked-by: Roger Quadros <rogerq at kernel.org>
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