[PATCH v2 2/3] arm64: dts: ti: Introduce J742S2 SoC family

[Nishanth Menon]

On 12:43-20240730, Manorit Chawdhry wrote:
> This device is a subset of J784S4 and shares the same memory map and
> thus the nodes are being reused from J784S4 to avoid duplication.
> 
> Here are some of the salient features of the J742S2 automotive grade
> application processor:
> 
> The J742S2 SoC belongs to the K3 Multicore SoC architecture platform,
> providing advanced system integration in automotive, ADAS and industrial
> applications requiring AI at the network edge. This SoC extends the K3
> Jacinto 7 family of SoCs with focus on raising performance and
> integration while providing interfaces, memory architecture and compute
> performance for multi-sensor, high concurrency applications.
> 
> Some changes that this devices has from J784S4 are:
> * 4x Cortex-A72 vs 8x Cortex-A72
> * 3x C7x DSP vs 4x C7x DSP
> * 4 port ethernet switch vs 8 port ethernet switch
> 
> ( Refer Table 2-1 for Device comparison with J7AHP )
> Link: https://www.ti.com/lit/pdf/spruje3 (TRM)
> Signed-off-by: Manorit Chawdhry <m-chawdhry at ti.com>
> ---
>  arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi | 44 ++++++++++++++++++++++++++++++
>  arch/arm64/boot/dts/ti/k3-j742s2.dtsi      | 26 ++++++++++++++++++
>  2 files changed, 70 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi
> new file mode 100644
> index 000000000000..13b83560d5a2
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j742s2-main.dtsi
> @@ -0,0 +1,44 @@
> +// SPDX-License-Identifier: GPL-2.0

and MIT please.

> +/*
> + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
> + *
> + * EVM Board Schematics: https://www.ti.com/lit/zip/SPAC001

Point to SoC trm here.


> + */
> +
> +/delete-node/ &c71_3;

here and below:

> +
> +&c71_0 {
> +	firmware-name = "j742s2-c71_0-fw";
> +};
> +
> +&c71_1 {
> +	firmware-name = "j742s2-c71_1-fw";
> +};
> +
> +&c71_2 {
> +	firmware-name = "j742s2-c71_2-fw";
> +};
> +
> +&main_r5fss0_core0 {
> +	firmware-name = "j742s2-main-r5f0_0-fw";
> +};
> +
> +&main_r5fss0_core1 {
> +	firmware-name = "j742s2-main-r5f0_1-fw";
> +};
> +
> +&main_r5fss1_core0 {
> +	firmware-name = "j742s2-main-r5f1_0-fw";
> +};
> +
> +&main_r5fss1_core1 {
> +	firmware-name = "j742s2-main-r5f1_1-fw";
> +};
> +
> +&main_r5fss2_core0 {
> +	firmware-name = "j742s2-main-r5f2_0-fw";
> +};
> +
> +&main_r5fss2_core1 {
> +	firmware-name = "j742s2-main-r5f2_1-fw";
> +};
> diff --git a/arch/arm64/boot/dts/ti/k3-j742s2.dtsi b/arch/arm64/boot/dts/ti/k3-j742s2.dtsi
> new file mode 100644
> index 000000000000..0b20c992d664
> --- /dev/null
> +++ b/arch/arm64/boot/dts/ti/k3-j742s2.dtsi
> @@ -0,0 +1,26 @@
> +// SPDX-License-Identifier: GPL-2.0

Same - and fix anywhere else as required.

> +/*
> + * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
> + *
> + * EVM Board Schematics: https://www.ti.com/lit/zip/SPAC001

Same

> + */
> +
> +#include "k3-j784s4.dtsi"
> +
> +/ {
> +	model = "Texas Instruments K3 J742S2 SoC";
> +	compatible = "ti,j742s2";
> +
> +	cpus {
> +		cpu-map {
> +			/delete-node/ cluster1;
> +		};
> +	};
> +
> +	/delete-node/ cpu4;
> +	/delete-node/ cpu5;
> +	/delete-node/ cpu6;
> +	/delete-node/ cpu7;

I suggest refactoring by renaming the dtsi files as common and split out
j784s4 similar to j722s/am62p rather than using /delete-node/


> +};
> +
> +#include "k3-j742s2-main.dtsi"
> 
> -- 
> 2.45.1
> 

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D