[PATCH] iommu/arm-smmu-qcom: Work around SDM845 Adreno SMMU w/ 16K pages

[Konrad Dybcio]

On 30.07.2024 10:50 AM, Dmitry Baryshkov wrote:
> On Tue, 30 Jul 2024 at 11:08, Konrad Dybcio <konradybcio at gmail.com> wrote:
>>
>> On 29.07.2024 11:21 PM, Dmitry Baryshkov wrote:
>>> On Tue, 30 Jul 2024 at 00:08, Rob Clark <robdclark at gmail.com> wrote:
>>>>
>>>> On Mon, Jul 29, 2024 at 1:14 PM Dmitry Baryshkov
>>>> <dmitry.baryshkov at linaro.org> wrote:
>>>>>
>>>>> On Mon, Jul 29, 2024 at 10:37:48AM GMT, Konrad Dybcio wrote:
>>>>>> From: Konrad Dybcio <konrad.dybcio at linaro.org>
>>>>>>
>>>>>> SDM845's Adreno SMMU is unique in that it actually advertizes support
>>>>>> for 16K (and 32M) pages, which doesn't hold for newer SoCs.
>>>>>>
>>>>>> This however, seems either broken in the hardware implementation, the
>>>>>> hypervisor middleware that abstracts the SMMU, or there's a bug in the
>>>>>> Linux kernel somewhere down the line that nobody managed to track down.
>>>>>>
>>>>>> Booting SDM845 with 16K page sizes and drm/msm results in:
>>>>>>
>>>>>> *** gpu fault: ttbr0=0000000000000000 iova=000100000000c000 dir=READ
>>>>>> type=TRANSLATION source=CP (0,0,0,0)
>>>>>>
>>>>>> right after loading the firmware. The GPU then starts spitting out
>>>>>> illegal intstruction errors, as it's quite obvious that it got a
>>>>>> bogus pointer.
>>>>>>
>>>>>> Hide 16K support on SDM845's Adreno SMMU to work around this.
>>>>>>
>>>>>> Reported-by: Sumit Semwal <sumit.semwal at linaro.org>
>>>>>> Signed-off-by: Konrad Dybcio <konrad.dybcio at linaro.org>
>>>>>> ---
>>>>>> There's a mismatch in sender/committer addresses but that's "fine":
>>>>>> https://lore.kernel.org/linux-usb/2024072734-scenic-unwilling-71ea@gregkh/
>>>>>> ---
>>>>>>  drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 10 ++++++++++
>>>>>>  1 file changed, 10 insertions(+)
>>>>>>
>>>>>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>>>>>> index 36c6b36ad4ff..d25825c05817 100644
>>>>>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>>>>>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>>>>>> @@ -338,6 +338,15 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu)
>>>>>>       return 0;
>>>>>>  }
>>>>>>
>>>>>> +static int qcom_adreno_smmuv2_cfg_probe(struct arm_smmu_device *smmu)
>>>>>> +{
>>>>>> +     /* SDM845 Adreno SMMU advertizes 16K pages support, but something is broken */
>>>>>> +     if (of_device_is_compatible(smmu->dev->of_node, "qcom,sdm845-smmu-v2"))
>>>>>> +             smmu->features &= ~ARM_SMMU_FEAT_FMT_AARCH64_16K;
>>>>>
>>>>> Shouldn't we hide that uncoditionally as it's likely that none of v2
>>>>> Adreno SMMUs support 16k pages?
>>>>
>>>> Hmm, that would be unfortunate to have the GPU not supporting the CPU
>>>> page size.  I guess we could still map 16k pages as multiple 4k pages,
>>>> but that is a bit sad..
>>>
>>> For now this might be limited to older platforms (v2 vs -500)
>>
>> In the commit message:
>>
>>>>>> SDM845's Adreno SMMU is unique in that it actually advertizes support
>>>>>> for 16K (and 32M) pages, which doesn't hold for newer SoCs.
> 
> My question is about forbidding 16k pages for sdm845 only or for other
> chips too. I'd assume that it shouldn't also work for other smmu-v2
> platforms.

I'd say we shouldn't cause trouble unless we know it's an issue

Konrad