[PATCH v3 6/7] Drivers: hv: vmbus: Get the IRQ number from DT
Krzysztof Kozlowski
krzk at kernel.org
Sat Jul 27 02:20:49 PDT 2024
On 27/07/2024 11:17, Arnd Bergmann wrote:
> On Sat, Jul 27, 2024, at 10:56, Krzysztof Kozlowski wrote:
>> On 27/07/2024 00:59, Roman Kisel wrote:
>>> @@ -2338,6 +2372,21 @@ static int vmbus_device_add(struct platform_device *pdev)
>>> cur_res = &res->sibling;
>>> }
>>>
>>> + /*
>>> + * Hyper-V always assumes DMA cache coherency, and the DMA subsystem
>>> + * might default to 'not coherent' on some architectures.
>>> + * Avoid high-cost cache coherency maintenance done by the CPU.
>>> + */
>>> +#if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
>>> + defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
>>> + defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL)
>>> +
>>> + if (!of_property_read_bool(np, "dma-coherent"))
>>> + pr_warn("Assuming cache coherent DMA transactions, no 'dma-coherent' node supplied\n");
>>
>> Why do you need this property at all, if it is allways dma-coherent? Are
>> you supporting dma-noncoherent somewhere?
>
> It's just a sanity check that the DT is well-formed.
>
> Since the dma-coherent property is interpreted by common code, it's
> not up to hv to change the default for the platform. I'm not sure
> if the presence of CONFIG_ARCH_HAS_SYNC_DMA_* options is the correct
> check to determine that an architecture defaults to noncoherent
> though, as the function may be needed to do something else.
>
> The global "dma_default_coherent' may be a better thing to check
> for. This is e.g. set on powerpc64, riscv and on specific mips
> platforms, but it's never set on arm64 as far as I can tell.
Kernel's task is not to validate the DT. Even if it was, above code
works poor. What if someone adds 'dma-noncoherent'?
The job of the bindings and DT schema is to validate and check DT if is
well formed.
Best regards,
Krzysztof
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