mx93: No cache hierachy definitions for ARM cores

[Stefan Wahren]

Hi,

Am 19.07.24 um 04:38 schrieb Fabio Estevam:
> On Wed, Jul 17, 2024 at 2:49 PM Stefan Wahren <wahrenst at gmx.net> wrote:
>> Hi,
>> today i noticed that imx93.dtsi lacks the cache definitions for the
>> Cortex-A55 cores:
>>
>> cacheinfo: Unable to detect cache hierarchy for CPU 0
>>
>> Maybe someone with more insight can add this to the imx93.dtsi file.
> Frank, can you help?
>
the description for caches can be found in the device tree spezification
[1]. AFAIK there is no specific binding in the kernel documentation.
Maybe a good example for reference would be [2].

Regards

[1] - https://github.com/devicetree-org/devicetree-specification
[2] -
https://elixir.bootlin.com/linux/v6.10/source/arch/arm64/boot/dts/rockchip/rk3588s.dtsi