[PATCH V2 3/7] PCI: dwc: Add pcie-designware-msi driver related Kconfig option

[Mayank Rana]

PCIe designware MSI driver (pcie-designware-msi.c) shall be used without
enabling pcie-designware core drivers (e.g. usage with ECAM driver). Hence
add Kconfig option to enable pcie-designware-msi driver as separate module.

Signed-off-by: Mayank Rana <quic_mrana at quicinc.com>
---
 drivers/pci/controller/dwc/Kconfig               |  8 ++++++++
 drivers/pci/controller/dwc/Makefile              |  3 ++-
 drivers/pci/controller/dwc/pcie-designware-msi.h | 14 ++++++++++++++
 3 files changed, 24 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
index 8afacc9..a4c8920 100644
--- a/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@ -6,8 +6,16 @@ menu "DesignWare-based PCIe controllers"
 config PCIE_DW
 	bool
 
+config PCIE_DW_MSI
+	bool "DWC PCIe based MSI controller"
+	depends on PCI_MSI
+	help
+	  Say Y here to enable DWC PCIe based MSI controller to support
+	  MSI functionality.
+
 config PCIE_DW_HOST
 	bool
+	select PCIE_DW_MSI
 	select PCIE_DW
 
 config PCIE_DW_EP
diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/dwc/Makefile
index 2ecc603..9e8e4515 100644
--- a/drivers/pci/controller/dwc/Makefile
+++ b/drivers/pci/controller/dwc/Makefile
@@ -1,6 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 obj-$(CONFIG_PCIE_DW) += pcie-designware.o
-obj-$(CONFIG_PCIE_DW_HOST) += pcie-designware-host.o pcie-designware-msi.o
+obj-$(CONFIG_PCIE_DW_MSI) += pcie-designware-msi.o
+obj-$(CONFIG_PCIE_DW_HOST) += pcie-designware-host.o
 obj-$(CONFIG_PCIE_DW_EP) += pcie-designware-ep.o
 obj-$(CONFIG_PCIE_DW_PLAT) += pcie-designware-plat.o
 obj-$(CONFIG_PCIE_BT1) += pcie-bt1.o
diff --git a/drivers/pci/controller/dwc/pcie-designware-msi.h b/drivers/pci/controller/dwc/pcie-designware-msi.h
index cf5c612..2872775f 100644
--- a/drivers/pci/controller/dwc/pcie-designware-msi.h
+++ b/drivers/pci/controller/dwc/pcie-designware-msi.h
@@ -40,10 +40,24 @@ struct dw_msi {
 	void			*private_data;
 };
 
+#if IS_ENABLED(CONFIG_PCIE_DW_MSI)
 struct dw_msi *dw_pcie_msi_host_init(struct platform_device *pdev,
 			struct dw_msi_ops *ops, u32 num_vectors);
 int dw_pcie_allocate_domains(struct dw_msi *msi);
 void dw_pcie_msi_init(struct dw_msi *msi);
 void dw_pcie_free_msi(struct dw_msi *msi);
 irqreturn_t dw_handle_msi_irq(struct dw_msi *msi);
+#else
+static inline struct dw_msi *dw_pcie_msi_host_init(struct platform_device *pdev,
+			struct dw_msi_ops *ops, u32 num_vectors)
+{ return ERR_PTR(-ENODEV); }
+static inline int dw_pcie_allocate_domains(struct dw_msi *msi)
+{ return -ENODEV; }
+static inline void dw_pcie_msi_init(struct dw_msi *msi)
+{ }
+static inline void dw_pcie_free_msi(struct dw_msi *msi)
+{ }
+static inline irqreturn_t dw_handle_msi_irq(struct dw_msi *msi)
+{ return IRQ_NONE; }
+#endif
 #endif /* _PCIE_DESIGNWARE_MSI_H */
-- 
2.7.4