[EXT] Re: [PATCH v5 2/5] dt-bindings: arm: fsl: add imx-se-fw binding doc

[Pankaj Gupta]

> -----Original Message-----
> From: Rob Herring <robh at kernel.org>
> Sent: Friday, July 12, 2024 11:34 PM
> To: Pankaj Gupta <pankaj.gupta at nxp.com>
> Cc: Jonathan Corbet <corbet at lwn.net>; Krzysztof Kozlowski
> <krzk+dt at kernel.org>; Conor Dooley <conor+dt at kernel.org>; Shawn Guo
> <shawnguo at kernel.org>; Sascha Hauer <s.hauer at pengutronix.de>;
> Pengutronix Kernel Team <kernel at pengutronix.de>; Fabio Estevam
> <festevam at gmail.com>; linux-doc at vger.kernel.org; linux-
> kernel at vger.kernel.org; devicetree at vger.kernel.org; imx at lists.linux.dev;
> linux-arm-kernel at lists.infradead.org
> Subject: [EXT] Re: [PATCH v5 2/5] dt-bindings: arm: fsl: add imx-se-fw binding
> doc
> 
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> 
> On Fri, Jul 12, 2024 at 11:49:57AM +0530, Pankaj Gupta wrote:
> > The NXP security hardware IP(s) like: i.MX EdgeLock Enclave, V2X etc.,
> > creates an embedded secure enclave within the SoC boundary to enable
> > features like:
> > - HSM
> > - SHE
> > - V2X
> >
> > Secure-Enclave(s) communication interface are typically via message
> > unit, i.e., based on mailbox linux kernel driver. This driver enables
> > communication ensuring well defined message sequence protocol between
> > Application Core and enclave's firmware.
> >
> > Driver configures multiple misc-device on the MU, for multiple
> > user-space applications, to be able to communicate over single MU.
> >
> > It exists on some i.MX processors. e.g. i.MX8ULP, i.MX93 etc.
> >
> > Signed-off-by: Pankaj Gupta <pankaj.gupta at nxp.com>
> > ---
> >  .../devicetree/bindings/firmware/fsl,imx-se.yaml   | 111
> +++++++++++++++++++++
> >  1 file changed, 111 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > new file mode 100644
> > index 000000000000..bd99505de6e6
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/firmware/fsl,imx-se.yaml
> > @@ -0,0 +1,111 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> >
> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fschemas%2Ffirmware%2Ffsl%2Cimx-
> se.yaml%23&data=05%7C02%7
> >
> +Cpankaj.gupta%40nxp.com%7Cf1bfd437edfe4dcc6c0b08dca29d0434%7C6
> 86ea1d3
> >
> +bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638564042462565488%7CUn
> known%7CTWF
> >
> +pbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJ
> XVCI6
> >
> +Mn0%3D%7C0%7C%7C%7C&sdata=Uxa8Cb3W5imjH%2FZGUEaGGO4VYFO
> oeVwzJmeFd6SbJ
> > +TU%3D&reserved=0
> > +$schema:
> >
> +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fmeta-
> schemas%2Fcore.yaml%23&data=05%7C02%7Cpankaj.gupta%
> >
> +40nxp.com%7Cf1bfd437edfe4dcc6c0b08dca29d0434%7C686ea1d3bc2b4c
> 6fa92cd9
> >
> +9c5c301635%7C0%7C0%7C638564042462575447%7CUnknown%7CTWF
> pbGZsb3d8eyJWI
> >
> +joiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7
> C0%7C%
> >
> +7C%7C&sdata=bhF5HZ655JjWQCaTu3BP5rd1kXZLSb8PKNsle7aWRq4%3D&
> reserved=0
> > +
> > +title: NXP i.MX HW Secure Enclave(s) EdgeLock Enclave
> > +
> > +maintainers:
> > +  - Pankaj Gupta <pankaj.gupta at nxp.com>
> > +
> > +description: |
> > +  NXP's SoC may contain one or multiple embedded secure-enclave HW
> > +  IP(s) like i.MX EdgeLock Enclave, V2X etc. These NXP's HW IP(s)
> > +  enables features like
> > +    - Hardware Security Module (HSM),
> > +    - Security Hardware Extension (SHE), and
> > +    - Vehicular to Anything (V2X)
> > +
> > +  Communication interface to the secure-enclaves is based on the
> > + messaging unit(s).
> > +
> > +properties:
> > +  $nodename:
> > +    pattern: "firmware@[0-9a-f]+$"
> > +
> > +  compatible:
> > +    enum:
> > +      - fsl,imx8ulp-se
> > +      - fsl,imx93-se
> > +      - fsl,imx95-se
> > +
> > +  reg:
> > +    maxItems: 1
> > +    description: Identifier of the communication interface to secure-enclave.
> 
> I don't understand what this is. How does someone determine what the value
> should be? Are there constraints on the values?

I will remove this. This was added to differentiate between multiple firmware nodes.

In case of the i.MX95 SoC, which has multiple firmware nodes, I proposed to make the following changes in .dtsi file:
        firmware at 0 {
                compatible = "fsl,imx95-se-fw";
                mbox-names = "tx", "rx";
                mboxes = <&elemu3 0 0>,
                         <&elemu3 1 0>;
        };

        firmware at 1 {
                compatible = "fsl,imx95-se-fw";
                mbox-names = "tx", "rx";
                mboxes = <&elemu4 0 0>,
                         <&elemu4 1 0>;
        };

> 
> > +
> > +  mboxes:
> > +    items:
> > +      - description: mailbox phandle to send message to se firmware
> 
> "mailbox phandle to " is redundant. Drop.
> 
Accepted.

> > +      - description: mailbox phandle to receive message from se
> > + firmware
> > +
> > +  mbox-names:
> > +    description: two names are to be listed, one for rx and other one for tx.
> > +      The name can be any of the below list.
> 
> I think this can be dropped. The schema says all this.
> 
Accepted.
Complete description will be removed"

> > +    items:
> > +      - const: tx
> > +      - const: rx
> > +
> > +  memory-region:
> > +    items:
> > +      - description: The phandle to the reserved external memory, the only
> > +          accessible memoryregion to secure enclave(SE) firmware. It is an
> > +          optional property based on compatible.
> > +          (see bindings/reserved-memory/reserved-memory.txt)
> 
> Drop. 'maxItems: 1' is sufficient.
Accepted.
> 
> > +
> > +  sram:
> > +    items:
> > +      - description: It is an optional property based on compatible.
> 
> Drop. 'maxItems: 1' is sufficient.
> 
> > +
> > +required:
> > +  - compatible
> > +  - reg
> > +  - mboxes
> > +  - mbox-names
> > +
> > +allOf:
> > +  # memory-region
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - fsl,imx8ulp-se
> > +              - fsl,imx93-se
> > +    then:
> > +      required:
> > +        - memory-region
> > +    else:
> > +      properties:
> > +        memory-region: false
> > +
> > +  # sram
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - fsl,imx8ulp-se
> > +    then:
> > +      required:
> > +        - sram
> > +
> > +    else:
> > +      properties:
> > +        sram: false
> > +
> > +additionalProperties: false
> > +
> > +examples:
> > +  - |
> > +    firmware {
> > +      #address-cells = <1>;
> > +      #size-cells = <0>;
> > +      firmware at 0 {
> > +        compatible = "fsl,imx95-se";
> > +        reg = <0x0>;
> > +        mboxes = <&ele_mu0 0 0>, <&ele_mu0 1 0>;
> > +        mbox-names = "tx", "rx";
> > +      };
> > +    };
> > +...
> >
> > --
> > 2.34.1
> >