[PATCH 2/3] pwm: imx27: Add 32k clock for pwm in i.MX8QXP MIPI subsystem

[Rob Herring]

On Thu, Jul 11, 2024 at 05:08:57PM -0400, Frank Li wrote:
> From: Liu Ying <victor.liu at nxp.com>
> 
> PWM in i.MX8QXP MIPI subsystem needs the clock '32k'. Use it if the DTS
> provides that.
> 
> Signed-off-by: Liu Ying <victor.liu at nxp.com>
> Signed-off-by: Frank Li <Frank.Li at nxp.com>
> ---
>  drivers/pwm/pwm-imx27.c | 33 ++++++++++++++++++++++++++++-----
>  1 file changed, 28 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/pwm/pwm-imx27.c b/drivers/pwm/pwm-imx27.c
> index 9e2bbf5b4a8ce..032bce7d1fdd3 100644
> --- a/drivers/pwm/pwm-imx27.c
> +++ b/drivers/pwm/pwm-imx27.c
> @@ -15,6 +15,7 @@
>  #include <linux/delay.h>
>  #include <linux/err.h>
>  #include <linux/io.h>
> +#include <linux/iopoll.h>
>  #include <linux/kernel.h>
>  #include <linux/module.h>
>  #include <linux/of.h>
> @@ -82,6 +83,7 @@
>  struct pwm_imx27_chip {
>  	struct clk	*clk_ipg;
>  	struct clk	*clk_per;
> +	struct clk	*clk_32k;
>  	void __iomem	*mmio_base;
>  
>  	/*
> @@ -101,23 +103,36 @@ static int pwm_imx27_clk_prepare_enable(struct pwm_imx27_chip *imx)
>  {
>  	int ret;
>  
> +	if (imx->clk_32k) {
> +		ret = clk_prepare_enable(imx->clk_32k);

IIRC, no need for the 'if' here. clk_prepare_enable() returns success 
for a NULL clock which is what devm_clk_get_optional() returns if the 
clock doesn't exist.

> +		if (ret)
> +			goto err1;
> +	}
> +
>  	ret = clk_prepare_enable(imx->clk_ipg);
>  	if (ret)
> -		return ret;
> +		goto err2;
>  
>  	ret = clk_prepare_enable(imx->clk_per);
> -	if (ret) {
> -		clk_disable_unprepare(imx->clk_ipg);
> -		return ret;
> -	}
> +	if (ret)
> +		goto err3;
>  
>  	return 0;
> +err3:
> +	clk_disable_unprepare(imx->clk_ipg);
> +err2:
> +	if (imx->clk_32k)
> +		clk_disable_unprepare(imx->clk_32k);
> +err1:
> +	return ret;
>  }
>  
>  static void pwm_imx27_clk_disable_unprepare(struct pwm_imx27_chip *imx)
>  {
>  	clk_disable_unprepare(imx->clk_per);
>  	clk_disable_unprepare(imx->clk_ipg);
> +	if (imx->clk_32k)
> +		clk_disable_unprepare(imx->clk_32k);

Same here.

>  }
>  
>  static int pwm_imx27_get_state(struct pwm_chip *chip,
> @@ -223,6 +238,7 @@ static int pwm_imx27_apply(struct pwm_chip *chip, struct pwm_device *pwm,
>  	struct pwm_imx27_chip *imx = to_pwm_imx27_chip(chip);
>  	unsigned long long c;
>  	unsigned long long clkrate;
> +	int val;

Goes in next patch.

>  	int ret;
>  	u32 cr;
>  
> @@ -325,6 +341,13 @@ static int pwm_imx27_probe(struct platform_device *pdev)
>  		return dev_err_probe(&pdev->dev, PTR_ERR(imx->clk_per),
>  				     "failed to get peripheral clock\n");
>  
> +	imx->clk_32k = devm_clk_get_optional(&pdev->dev, "32k");
> +	if (IS_ERR(imx->clk_32k)) {
> +		dev_err(&pdev->dev, "getting 32k clock failed with %ld\n",
> +				PTR_ERR(imx->clk_32k));

dev_err_probe.

> +		return PTR_ERR(imx->clk_32k);
> +	}
> +
>  	chip->ops = &pwm_imx27_ops;
>  
>  	imx->mmio_base = devm_platform_ioremap_resource(pdev, 0);
> 
> -- 
> 2.34.1
>