[PATCH 3/3] pwm: imx27: workaround of the pwm output bug when decrease the duty cycle

[Stefan Wahren]

Hi Frank,

Am 11.07.24 um 23:08 schrieb Frank Li:
> From: Clark Wang <xiaoning.wang at nxp.com>
>
> When the SAR FIFO is empty, the write value is directly applied to SAR even
> though the current period is not over. If the new SAR value is less than
> the old one and the counter is greater than the new SAR value, the current
> period will not flip the level. This result in a pulse with a 100% duty
> cycle.
>
> Write the old SAR value before updating the new duty cycle to SAR. This
> avoids writing the new value into an empty FIFO.
>
> This only resolves the issue when the PWM period is longer than 2us
> (or <500KHz) because write register is not quick enough when PWM period is
> very short.
>
> Reviewed-by: Jun Li <jun.li at nxp.com>
> Signed-off-by: Clark Wang <xiaoning.wang at nxp.com>
> Signed-off-by: Frank Li <Frank.Li at nxp.com>
the same patch has been submitted from other people in the past and they
received many review comments [1], [2].

Can you please explain which version of the patch this is and does it
address any review comments?

Best regards

[1] -
https://lore.kernel.org/linux-pwm/20211220073130.1429723-1-xiaoning.wang@nxp.com/
[2] -
https://lore.kernel.org/linux-pwm/20231229063013.1786-1-pratikmanvar09@gmail.com/