[PATCH v2 05/30] irqchip/armada-370-xp: Cosmetic fix parentheses in register constant definitions

[Ilpo Järvinen]

On Tue, 2 Jul 2024, Marek Behún wrote:

> Drop parentheses where not needed and add where makes sense in register
> constant definitions.
> 
> Signed-off-by: Marek Behún <kabel at kernel.org>
> Reviewed-by: Andrew Lunn <andrew at lunn.ch>
> ---
>  drivers/irqchip/irq-armada-370-xp.c | 38 ++++++++++++++---------------
>  1 file changed, 19 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
> index 18aca9b5d3b3..14d213e9b0d2 100644
> --- a/drivers/irqchip/irq-armada-370-xp.c
> +++ b/drivers/irqchip/irq-armada-370-xp.c
> @@ -116,33 +116,33 @@
>   */
>  
>  /* Registers relative to main_int_base */
> -#define ARMADA_370_XP_INT_CONTROL		(0x00)
> -#define ARMADA_370_XP_SW_TRIG_INT		(0x04)
> -#define ARMADA_370_XP_INT_SET_ENABLE		(0x30)
> -#define ARMADA_370_XP_INT_CLEAR_ENABLE		(0x34)
> -#define ARMADA_370_XP_INT_SOURCE_CTL(irq)	(0x100 + irq*4)
> +#define ARMADA_370_XP_INT_CONTROL		0x00
> +#define ARMADA_370_XP_SW_TRIG_INT		0x04
> +#define ARMADA_370_XP_INT_SET_ENABLE		0x30
> +#define ARMADA_370_XP_INT_CLEAR_ENABLE		0x34
> +#define ARMADA_370_XP_INT_SOURCE_CTL(irq)	(0x100 + (irq) * 4)
>  #define ARMADA_370_XP_INT_SOURCE_CPU_MASK	GENMASK(3, 0)
> -#define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid)	((BIT(0) | BIT(8)) << cpuid)
> +#define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid)	((BIT(0) | BIT(8)) << (cpuid))
>  
>  /* Registers relative to per_cpu_int_base */
> -#define ARMADA_370_XP_IN_DRBEL_CAUSE		(0x08)
> -#define ARMADA_370_XP_IN_DRBEL_MASK		(0x0c)
> -#define ARMADA_375_PPI_CAUSE			(0x10)
> -#define ARMADA_370_XP_CPU_INTACK		(0x44)
> -#define ARMADA_370_XP_INT_SET_MASK		(0x48)
> -#define ARMADA_370_XP_INT_CLEAR_MASK		(0x4C)
> -#define ARMADA_370_XP_INT_FABRIC_MASK		(0x54)
> +#define ARMADA_370_XP_IN_DRBEL_CAUSE		0x08
> +#define ARMADA_370_XP_IN_DRBEL_MASK		0x0c
> +#define ARMADA_375_PPI_CAUSE			0x10
> +#define ARMADA_370_XP_CPU_INTACK		0x44
> +#define ARMADA_370_XP_INT_SET_MASK		0x48
> +#define ARMADA_370_XP_INT_CLEAR_MASK		0x4C

Reviewed-by: Ilpo Järvinen <ilpo.jarvinen at linux.intel.com>

Although, it would be nice to have consistent hex form too as now there's 
0x0c and 0x4C.

-- 
 i.