[PATCH] ARM: dts: stm32: Keep MDIO bus in AF across suspend DH STM32MP13xx DHCOR DHSBC board

[Marek Vasut]

On 7/4/24 6:38 PM, Alexandre TORGUE wrote:
> Hi Marek
> 
> On 6/29/24 22:28, Marek Vasut wrote:
>> The RTL8211F PHY gets confused when the MDIO bus lines get switched
>> to ANALOG during suspend/resume cycle. Keep the MDIO and MDC lines
>> in AF during suspend/resume to avoid confusing the PHY. The PHY can
>> be brought out of the confused state by restarting auto-negotiation
>> too, but that seems like an odd workaround and shouldn't be in the
>> PHY driver.
>>
>> Signed-off-by: Marek Vasut <marex at denx.de>
>> ---
>> Cc: Alexandre Torgue <alexandre.torgue at foss.st.com>
>> Cc: Christophe Roullier <christophe.roullier at foss.st.com>
>> Cc: Conor Dooley <conor+dt at kernel.org>
>> Cc: Krzysztof Kozlowski <krzk+dt at kernel.org>
>> Cc: Maxime Coquelin <mcoquelin.stm32 at gmail.com>
>> Cc: Rob Herring <robh at kernel.org>
>> Cc: devicetree at vger.kernel.org
>> Cc: kernel at dh-electronics.com
>> Cc: linux-arm-kernel at lists.infradead.org
>> Cc: linux-stm32 at st-md-mailman.stormreply.com
>> ---
>>   arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 20 ++++++++++++++++----
>>   1 file changed, 16 insertions(+), 4 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi 
>> b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
>> index d3deec602ae7a..e6c0dceee9866 100644
>> --- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
>> +++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
>> @@ -88,14 +88,20 @@ pins2 {
>>       eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-0 {
>>           pins1 {
>> +            pinmux = <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
>> +                 <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
>> +            bias-disable;
>> +            drive-push-pull;
>> +            slew-rate = <2>;
>> +        };
>> +
>> +        pins2 {
>>               pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* 
>> ETH_RGMII_TXD0 */
>>                    <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
>>                    <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
>>                    <STM32_PINMUX('E', 5, ANALOG)>, /* ETH_RGMII_TXD3 */
>>                    <STM32_PINMUX('B', 11, ANALOG)>, /* 
>> ETH_RGMII_TX_CTL */
>>                    <STM32_PINMUX('C', 1, ANALOG)>, /* 
>> ETH_RGMII_GTX_CLK */
>> -                 <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
>> -                 <STM32_PINMUX('G', 2, ANALOG)>, /* ETH_MDC */
>>                    <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
>>                    <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
>>                    <STM32_PINMUX('B', 0, ANALOG)>, /* ETH_RGMII_RXD1 */
>> @@ -169,14 +175,20 @@ pins2 {
>>       eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-0 {
>>           pins1 {
>> +            pinmux = <STM32_PINMUX('B', 6, ANALOG)>, /* ETH_MDIO */
>> +                 <STM32_PINMUX('G', 5, ANALOG)>; /* ETH_MDC */
> 
> Why don't you put PB6 and PG5 in AF for the sleep config as for ETH1 ?

Fixed in V2, thanks for spotting this.