[PATCH v5] perf/marvell: Marvell PEM performance monitor support

[Will Deacon]

On Thu, Jun 20, 2024 at 06:46:21PM +0530, Gowthami Thiagarajan wrote:
> PCI Express Interface PMU includes various performance counters
> to monitor the data that is transmitted over the PCIe link. The
> counters track various inbound and outbound transactions which
> includes separate counters for posted/non-posted/completion TLPs.
> Also, inbound and outbound memory read requests along with their
> latencies can also be monitored. Address Translation Services(ATS)events
> such as ATS Translation, ATS Page Request, ATS Invalidation along with
> their corresponding latencies are also supported.
> 
> The performance counters are 64 bits wide.
> 
> For instance,
> perf stat -e ib_tlp_pr <workload>
> tracks the inbound posted TLPs for the workload.
> 
> Signed-off-by: Gowthami Thiagarajan <gthiagarajan at marvell.com>
> ---
> 
> v4->v5:
> - Kconfig : Removed the dependency on 64BIT based on the feedback received.
> 
>  MAINTAINERS                    |   6 +
>  drivers/perf/Kconfig           |   7 +
>  drivers/perf/Makefile          |   1 +
>  drivers/perf/marvell_pem_pmu.c | 425 +++++++++++++++++++++++++++++++++
>  include/linux/cpuhotplug.h     |   1 +
>  5 files changed, 440 insertions(+)
>  create mode 100644 drivers/perf/marvell_pem_pmu.c

PLease add some documentation for the new driver (see
Documentation/admin-guide/perf for some examples).

Will