[PATCH 5/9] arm64: dts: exynos: gs101: define USI12 with I2C configuration

Sam Protsenko semen.protsenko at linaro.org
Fri Jan 26 18:55:04 PST 2024


On Fri, Jan 26, 2024 at 6:19 PM André Draszik <andre.draszik at linaro.org> wrote:
>
> On the gs101-oriole board, i2c bus 12 has various USB-related
> controllers attached to it.
>
> Note the selection of the USI protocol is intentionally left for the
> board dts file.
>
> Signed-off-by: André Draszik <andre.draszik at linaro.org>
> ---
>  arch/arm64/boot/dts/exynos/google/gs101.dtsi | 30 ++++++++++++++++++++
>  1 file changed, 30 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> index 5088c81fd6aa..d66590fa922f 100644
> --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
> @@ -450,6 +450,36 @@ pinctrl_peric1: pinctrl at 10c40000 {
>                         interrupts = <GIC_SPI 644 IRQ_TYPE_LEVEL_HIGH 0>;
>                 };
>
> +               usi12: usi at 10d500c0 {
> +                       compatible = "google,gs101-usi",
> +                                    "samsung,exynos850-usi";

It doesn't fit on one line?

> +                       reg = <0x10d500c0 0x20>;
> +                       ranges;
> +                       #address-cells = <1>;
> +                       #size-cells = <1>;
> +                       clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>,
> +                                <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>;
> +                       clock-names = "pclk", "ipclk";
> +                       samsung,sysreg = <&sysreg_peric1 0x1010>;
> +                       samsung,mode = <USI_V2_NONE>;
> +                       status = "disabled";
> +
> +                       hsi2c_12: i2c at 10d50000 {
> +                               compatible = "google,gs101-hsi2c",
> +                                            "samsung,exynosautov9-hsi2c";
> +                               reg = <0x10d50000 0xc0>;
> +                               interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
> +                               #address-cells = <1>;
> +                               #size-cells = <0>;
> +                               pinctrl-names = "default";
> +                               pinctrl-0 = <&hsi2c12_bus>;

I remember Krzysztof asked me to put pinctrl-0 first in my recent
patches. Not sure how important it is, just saying. Other than that,
LGTM:

Reviewed-by: Sam Protsenko <semen.protsenko at linaro.org>

> +                               clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>,
> +                                        <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>;
> +                               clock-names = "hsi2c", "hsi2c_pclk";
> +                               status = "disabled";
> +                       };
> +               };
> +
>                 pinctrl_hsi1: pinctrl at 11840000 {
>                         compatible = "google,gs101-pinctrl";
>                         reg = <0x11840000 0x00001000>;
> --
> 2.43.0.429.g432eaa2c6b-goog
>



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